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/optee_os/core/arch/arm/plat-versal/
H A Dsub.mk2ac8d9a818a7b2dd6b7b6a2e5b8adfaf34fbe577 Wed Apr 06 08:17:38 UTC 2022 Jorge Ramirez-Ortiz <jorge@foundries.io> plat-versal: add support for Xilinx's Versal ACAP platform

Initial support for the Versal ACAP validated on the AI Core Series VKC190
Evaluation Kit.

The following BIF file is used by bootgen to generate the Versal boot.bin
image.

the_ROM_image:
{
image {
{ type=bootimage, file=vpl_gen_fixed.pdi }
{ type=bootloader, file=plm.elf }
{ core=psm, file=psmfw.elf }
}

image {
id = 0x1c000000, name=apu_subsystem
{ type=raw, load=0x00001000, file=system.dtb }
{ core=a72-0, exception_level=el-3, trustzone, file=bl31.elf }
{ core=a72-0, exception_level=el-2, file=u-boot.elf }
{ core=a72-0, exception_level=el-1, trustzone, file=tee.elf }
}
}

$ ./bootgen -arch versal -image boot.bif -o BOOT.BIN

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: John Linn <linnj@xilinx.com>
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
H A Dplatform_config.h2ac8d9a818a7b2dd6b7b6a2e5b8adfaf34fbe577 Wed Apr 06 08:17:38 UTC 2022 Jorge Ramirez-Ortiz <jorge@foundries.io> plat-versal: add support for Xilinx's Versal ACAP platform

Initial support for the Versal ACAP validated on the AI Core Series VKC190
Evaluation Kit.

The following BIF file is used by bootgen to generate the Versal boot.bin
image.

the_ROM_image:
{
image {
{ type=bootimage, file=vpl_gen_fixed.pdi }
{ type=bootloader, file=plm.elf }
{ core=psm, file=psmfw.elf }
}

image {
id = 0x1c000000, name=apu_subsystem
{ type=raw, load=0x00001000, file=system.dtb }
{ core=a72-0, exception_level=el-3, trustzone, file=bl31.elf }
{ core=a72-0, exception_level=el-2, file=u-boot.elf }
{ core=a72-0, exception_level=el-1, trustzone, file=tee.elf }
}
}

$ ./bootgen -arch versal -image boot.bif -o BOOT.BIN

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: John Linn <linnj@xilinx.com>
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
H A Dmain.c2ac8d9a818a7b2dd6b7b6a2e5b8adfaf34fbe577 Wed Apr 06 08:17:38 UTC 2022 Jorge Ramirez-Ortiz <jorge@foundries.io> plat-versal: add support for Xilinx's Versal ACAP platform

Initial support for the Versal ACAP validated on the AI Core Series VKC190
Evaluation Kit.

The following BIF file is used by bootgen to generate the Versal boot.bin
image.

the_ROM_image:
{
image {
{ type=bootimage, file=vpl_gen_fixed.pdi }
{ type=bootloader, file=plm.elf }
{ core=psm, file=psmfw.elf }
}

image {
id = 0x1c000000, name=apu_subsystem
{ type=raw, load=0x00001000, file=system.dtb }
{ core=a72-0, exception_level=el-3, trustzone, file=bl31.elf }
{ core=a72-0, exception_level=el-2, file=u-boot.elf }
{ core=a72-0, exception_level=el-1, trustzone, file=tee.elf }
}
}

$ ./bootgen -arch versal -image boot.bif -o BOOT.BIN

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: John Linn <linnj@xilinx.com>
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
H A Dconf.mk2ac8d9a818a7b2dd6b7b6a2e5b8adfaf34fbe577 Wed Apr 06 08:17:38 UTC 2022 Jorge Ramirez-Ortiz <jorge@foundries.io> plat-versal: add support for Xilinx's Versal ACAP platform

Initial support for the Versal ACAP validated on the AI Core Series VKC190
Evaluation Kit.

The following BIF file is used by bootgen to generate the Versal boot.bin
image.

the_ROM_image:
{
image {
{ type=bootimage, file=vpl_gen_fixed.pdi }
{ type=bootloader, file=plm.elf }
{ core=psm, file=psmfw.elf }
}

image {
id = 0x1c000000, name=apu_subsystem
{ type=raw, load=0x00001000, file=system.dtb }
{ core=a72-0, exception_level=el-3, trustzone, file=bl31.elf }
{ core=a72-0, exception_level=el-2, file=u-boot.elf }
{ core=a72-0, exception_level=el-1, trustzone, file=tee.elf }
}
}

$ ./bootgen -arch versal -image boot.bif -o BOOT.BIN

Signed-off-by: Jorge Ramirez-Ortiz <jorge@foundries.io>
Signed-off-by: John Linn <linnj@xilinx.com>
Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com>
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>