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| H A D | clk-stm32mp13.c | 1bc6d1bc094540afcf8c5e45ace8d69c61c510df Fri Jan 26 13:01:18 UTC 2024 Etienne Carriere <etienne.carriere@foss.st.com> drivers: clk: set stm32mp13 clock flags
On STM32MP13 SoC, setting PLL1P, PLL1P_DIV, MPU, AXI and MLAHB clocks
rate must be handled from their respective parent clock. Set flag
CLK_SET_RATE_PARENT for these clocks.
On STM32MP13 SoC, MPU, AXI and MLAHB clocks are internal bus clocks
that must not be disabled even when we re-parent them. Set flag
CLK_SET_PARENT_PRE_ENABLE for these clocks.
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
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