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/rk3399_ARM-atf/plat/amd/versal2/
H A Dscmi.c15a9e381cdfc607e516f86adc118d036ce78aa86 Mon Oct 14 04:22:43 UTC 2024 Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> fix(versal2): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.

Change-Id: I33028cf220fa0768f8f266db294c42810f62b61c
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
H A Dbl31_setup.c15a9e381cdfc607e516f86adc118d036ce78aa86 Mon Oct 14 04:22:43 UTC 2024 Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com> fix(versal2): explicitly check operators precedence

This corrects the MISRA violation C2012-12.1:
The precedence of operators within expressions should be
made explicit.
Enclosed the subexpression in parentheses to maintain
the precedence.

Change-Id: I33028cf220fa0768f8f266db294c42810f62b61c
Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>