| /rk3399_ARM-atf/fdts/ |
| H A D | stm32mp257.dtsi | 0dc283d29e4d962553046ea7ba30e90ea64f6d3d Wed Oct 07 13:29:52 UTC 2020 Alexandre Torgue <alexandre.torgue@foss.st.com> feat(stm32mp2-fdts): introduce stm32mp25 SoCs family
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35, common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode. -STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/ A35 frequency: -STM32MP25xY, "Y" gives information: -Y = A means A35@1.2GHz + no cryp IP and no secure boot. -Y = C means A35@1.2GHz + cryp IP and secure boot. -Y = D means A35@1.5GHz + no cryp IP and no secure boot. -Y = F means A35@1.5GHz + cryp IP and secure boot.
Change-Id: Icd1351e20b862675d257dede55df190a90acbd59 Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| H A D | stm32mp255.dtsi | 0dc283d29e4d962553046ea7ba30e90ea64f6d3d Wed Oct 07 13:29:52 UTC 2020 Alexandre Torgue <alexandre.torgue@foss.st.com> feat(stm32mp2-fdts): introduce stm32mp25 SoCs family
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35, common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode. -STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/ A35 frequency: -STM32MP25xY, "Y" gives information: -Y = A means A35@1.2GHz + no cryp IP and no secure boot. -Y = C means A35@1.2GHz + cryp IP and secure boot. -Y = D means A35@1.5GHz + no cryp IP and no secure boot. -Y = F means A35@1.5GHz + cryp IP and secure boot.
Change-Id: Icd1351e20b862675d257dede55df190a90acbd59 Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| H A D | stm32mp25xc.dtsi | 0dc283d29e4d962553046ea7ba30e90ea64f6d3d Wed Oct 07 13:29:52 UTC 2020 Alexandre Torgue <alexandre.torgue@foss.st.com> feat(stm32mp2-fdts): introduce stm32mp25 SoCs family
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35, common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode. -STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/ A35 frequency: -STM32MP25xY, "Y" gives information: -Y = A means A35@1.2GHz + no cryp IP and no secure boot. -Y = C means A35@1.2GHz + cryp IP and secure boot. -Y = D means A35@1.5GHz + no cryp IP and no secure boot. -Y = F means A35@1.5GHz + cryp IP and secure boot.
Change-Id: Icd1351e20b862675d257dede55df190a90acbd59 Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| H A D | stm32mp253.dtsi | 0dc283d29e4d962553046ea7ba30e90ea64f6d3d Wed Oct 07 13:29:52 UTC 2020 Alexandre Torgue <alexandre.torgue@foss.st.com> feat(stm32mp2-fdts): introduce stm32mp25 SoCs family
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35, common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode. -STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/ A35 frequency: -STM32MP25xY, "Y" gives information: -Y = A means A35@1.2GHz + no cryp IP and no secure boot. -Y = C means A35@1.2GHz + cryp IP and secure boot. -Y = D means A35@1.5GHz + no cryp IP and no secure boot. -Y = F means A35@1.5GHz + cryp IP and secure boot.
Change-Id: Icd1351e20b862675d257dede55df190a90acbd59 Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| H A D | stm32mp25xf.dtsi | 0dc283d29e4d962553046ea7ba30e90ea64f6d3d Wed Oct 07 13:29:52 UTC 2020 Alexandre Torgue <alexandre.torgue@foss.st.com> feat(stm32mp2-fdts): introduce stm32mp25 SoCs family
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35, common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode. -STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/ A35 frequency: -STM32MP25xY, "Y" gives information: -Y = A means A35@1.2GHz + no cryp IP and no secure boot. -Y = C means A35@1.2GHz + cryp IP and secure boot. -Y = D means A35@1.5GHz + no cryp IP and no secure boot. -Y = F means A35@1.5GHz + cryp IP and secure boot.
Change-Id: Icd1351e20b862675d257dede55df190a90acbd59 Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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| H A D | stm32mp251.dtsi | 0dc283d29e4d962553046ea7ba30e90ea64f6d3d Wed Oct 07 13:29:52 UTC 2020 Alexandre Torgue <alexandre.torgue@foss.st.com> feat(stm32mp2-fdts): introduce stm32mp25 SoCs family
STM32MP25 family is composed of 4 SoCs defined as following:
-STM32MP251: common part composed of 1*Cortex-A35, common peripherals like SDMMC, UART, SPI, I2C, PCIe, USB3, parallel and DSI display, 1*ETH ...
-STM32MP253: STM32MP251 + 1*Cortex-A35 (dual CPU), a second ETH, CAN-FD and LVDS display.
-STM32MP255: STM32MP253 + GPU/AI and video encode/decode. -STM32MP257: STM32MP255 + ETH TSN switch (2+1 ports).
A second diversity layer exists for security features/ A35 frequency: -STM32MP25xY, "Y" gives information: -Y = A means A35@1.2GHz + no cryp IP and no secure boot. -Y = C means A35@1.2GHz + cryp IP and secure boot. -Y = D means A35@1.5GHz + no cryp IP and no secure boot. -Y = F means A35@1.5GHz + cryp IP and secure boot.
Change-Id: Icd1351e20b862675d257dede55df190a90acbd59 Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com>
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