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/rk3399_ARM-atf/plat/nvidia/tegra/common/aarch64/
H A Dtegra_helpers.S0cd6138ddc88ac5eee8e13ec65f49442b349cc8e Tue Sep 22 08:03:56 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Tegra: enable processor retention and L2/CPUECTLR access

This patch enables the processor retention and L2/CPUECTLR read/write
access from the NS world only for Cortex-A57 CPUs on the Tegra SoCs.

Change-Id: I9941a67686ea149cb95d80716fa1d03645325445
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
/rk3399_ARM-atf/plat/nvidia/tegra/soc/t210/
H A Dplatform_t210.mk0cd6138ddc88ac5eee8e13ec65f49442b349cc8e Tue Sep 22 08:03:56 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Tegra: enable processor retention and L2/CPUECTLR access

This patch enables the processor retention and L2/CPUECTLR read/write
access from the NS world only for Cortex-A57 CPUs on the Tegra SoCs.

Change-Id: I9941a67686ea149cb95d80716fa1d03645325445
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>
/rk3399_ARM-atf/plat/nvidia/tegra/include/t210/
H A Dtegra_def.h0cd6138ddc88ac5eee8e13ec65f49442b349cc8e Tue Sep 22 08:03:56 UTC 2015 Varun Wadekar <vwadekar@nvidia.com> Tegra: enable processor retention and L2/CPUECTLR access

This patch enables the processor retention and L2/CPUECTLR read/write
access from the NS world only for Cortex-A57 CPUs on the Tegra SoCs.

Change-Id: I9941a67686ea149cb95d80716fa1d03645325445
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>