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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3528.c | 08bd15b0fe77ec0aa5f583eb2607bea8ce2d41bb Thu Feb 23 01:52:37 UTC 2023 Joseph Chen <chenjh@rock-chips.com> clk: rockchip: rk3528: Fix aclk_m_core register
Bootrom set the aclk_m_core_div=0 and SPL set cpu rate 600M,
so the aclk_m_core is 600M which overs the sign-off rate 550M
a little.
U-Boot use scmi clk to set high cpu rate which updates aclk_m_core_div
to corresponding value, it's safe.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: If5def6af30be417f5dbebdf416c2d9da7655520c
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