Searched hist:"00230 e37e3c21fed4a46eeb69dea9d808f8402b4" (Results 1 – 3 of 3) sorted by relevance
| /rk3399_ARM-atf/lib/cpus/aarch64/ |
| H A D | cortex_a78c.S | 00230e37e3c21fed4a46eeb69dea9d808f8402b4 Wed Jan 18 17:03:21 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A78C erratum 2772121
Cortex-A78C erratum 2772121 is a Cat B erratum that applies to
all revisions <=r0p2 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1707916/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I0e190dabffc20c4d3b9b98d1abeb50f308b80bb9
|
| /rk3399_ARM-atf/docs/design/ |
| H A D | cpu-specific-build-macros.rst | 00230e37e3c21fed4a46eeb69dea9d808f8402b4 Wed Jan 18 17:03:21 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A78C erratum 2772121
Cortex-A78C erratum 2772121 is a Cat B erratum that applies to
all revisions <=r0p2 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1707916/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I0e190dabffc20c4d3b9b98d1abeb50f308b80bb9
|
| /rk3399_ARM-atf/lib/cpus/ |
| H A D | cpu-ops.mk | 00230e37e3c21fed4a46eeb69dea9d808f8402b4 Wed Jan 18 17:03:21 UTC 2023 Bipin Ravi <bipin.ravi@arm.com> fix(cpus): workaround for Cortex-A78C erratum 2772121
Cortex-A78C erratum 2772121 is a Cat B erratum that applies to
all revisions <=r0p2 and is still open. The workaround is to
insert a dsb before the isb in the power down sequence.
SDEN documentation:
https://developer.arm.com/documentation/SDEN1707916/latest
Signed-off-by: Bipin Ravi <bipin.ravi@arm.com>
Change-Id: I0e190dabffc20c4d3b9b98d1abeb50f308b80bb9
|