Searched +full:tegra210 +full:- +full:i2s (Results 1 – 11 of 11) sorted by relevance
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Tegra210 I2S Controller Device Tree Bindings10 The Inter-IC Sound (I2S) controller implements full-duplex,11 bi-directional and single direction point-to-point serial12 interfaces. It can interface with I2S compatible devices.13 I2S controller can operate both in master and slave mode.16 - Jon Hunter <jonathanh@nvidia.com>[all …]
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)3 ---4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-ahub.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Tegra210 AHUB Device Tree Bindings11 for audio pre-processing, post-processing and a programmable full13 external interfaces such as I2S, DMIC, DSPK. It interfaces with ADMA17 - Jon Hunter <jonathanh@nvidia.com>18 - Sameer Pujar <spujar@nvidia.com>22 pattern: "^ahub@[0-9a-f]*$"[all …]
1 # SPDX-License-Identifier: GPL-2.03 snd-soc-tegra-pcm-objs := tegra_pcm.o4 snd-soc-tegra-utils-objs += tegra_asoc_utils.o5 snd-soc-tegra20-ac97-objs := tegra20_ac97.o6 snd-soc-tegra20-das-objs := tegra20_das.o7 snd-soc-tegra20-i2s-objs := tegra20_i2s.o8 snd-soc-tegra20-spdif-objs := tegra20_spdif.o9 snd-soc-tegra30-ahub-objs := tegra30_ahub.o10 snd-soc-tegra30-i2s-objs := tegra30_i2s.o11 snd-soc-tegra210-ahub-objs := tegra210_ahub.o[all …]
1 # SPDX-License-Identifier: GPL-2.0-only3 tristate "SoC Audio for the Tegra System-on-Chip"31 tristate "Tegra20 I2S interface"36 Tegra20 I2S interface. You will also need to select the individual57 tristate "Tegra30 I2S interface"62 Tegra30 I2S interface. You will also need to select the individual66 tristate "Tegra210 AHUB module"73 Say Y or M if you want to add support for Tegra210 AHUB module.76 tristate "Tegra210 DMIC module"84 Say Y or M if you want to add support for Tegra210 DMIC module.[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 // tegra210_i2s.c - Tegra210 I2S driver30 * On Tegra210, I2S4 has "i2s4a" and "i2s4b" pins and below update31 * is required to select i2s4b for it to be functional for I2S42 regmap_write(regmap, TEGRA210_I2S_SLOT_CTRL, total_slots - 1); in tegra210_i2s_set_slot_ctrl()50 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_set_clock_rate() local54 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()56 /* No need to set rates if I2S is being operated in slave */ in tegra210_i2s_set_clock_rate()60 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()62 dev_err(dev, "can't set I2S bit clock rate %u, err: %d\n", in tegra210_i2s_set_clock_rate()[all …]
1 /* SPDX-License-Identifier: GPL-2.0-only */3 * tegra210_i2s.h - Definitions for Tegra210 I2S driver12 /* Register offsets from I2S*_BASE */
1 // SPDX-License-Identifier: GPL-2.02 #include <dt-bindings/clock/tegra210-car.h>3 #include <dt-bindings/gpio/tegra-gpio.h>4 #include <dt-bindings/memory/tegra210-mc.h>5 #include <dt-bindings/pinctrl/pinctrl-tegra.h>6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>7 #include <dt-bindings/reset/tegra210-car.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/thermal/tegra124-soctherm.h>10 #include <dt-bindings/soc/tegra-pmc.h>[all …]
1 // SPDX-License-Identifier: GPL-2.02 #include <dt-bindings/clock/tegra186-clock.h>3 #include <dt-bindings/gpio/tegra186-gpio.h>4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/mailbox/tegra186-hsp.h>6 #include <dt-bindings/memory/tegra186-mc.h>7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>8 #include <dt-bindings/power/tegra186-powergate.h>9 #include <dt-bindings/reset/tegra186-reset.h>10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>[all …]
1 // SPDX-License-Identifier: GPL-2.02 #include <dt-bindings/clock/tegra194-clock.h>3 #include <dt-bindings/gpio/tegra194-gpio.h>4 #include <dt-bindings/interrupt-controller/arm-gic.h>5 #include <dt-bindings/mailbox/tegra186-hsp.h>6 #include <dt-bindings/pinctrl/pinctrl-tegra.h>7 #include <dt-bindings/power/tegra194-powergate.h>8 #include <dt-bindings/reset/tegra194-reset.h>9 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>10 #include <dt-bindings/memory/tegra194-mc.h>[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Copyright (c) 2012-2014 NVIDIA CORPORATION. All rights reserved.8 #include <linux/clk-provider.h>17 #include <dt-bindings/clock/tegra210-car.h>18 #include <dt-bindings/reset/tegra210-car.h>23 #include "clk-id.h"27 * banks present in the Tegra210 CAR IP block. The banks are244 /* I2S registers to handle during APE MBIST WAR */264 * SDM fractional divisor is 16-bit 2's complement signed number within265 * (-2^12 ... 2^12-1) range. Represented in PLL data structure as unsigned[all …]
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