Searched +full:1 +full:qav (Results 1 – 7 of 7) sorted by relevance
21 One external Ethernet port (port 1) with selectable RGMII/RMII interfaces and30 Support for Audio/Video Bridging (P802.1Qav/D6.0)56 maxItems: 176 maxItems: 197 const: 1102 port@1:111 - const: 1115 maxItems: 1206 #address-cells = <1>;209 cpsw_port1: port@1 {[all …]
51 also force the VMDq parameter to be 1 or more.181 Credit Based Shaper (Qav Mode)
181 #define E1000_CTRL_FD 0x00000001 /* Full duplex.0=half; 1=full */183 #define E1000_CTRL_LRST 0x00000008 /* Link reset. 0=normal,1=reset */189 #define E1000_CTRL_SPD_1000 0x00000200 /* Force 1Gb */196 #define E1000_CTRL_SWDPIN1 0x00080000 /* SWDPIN 1 value */220 #define E1000_PCS_LCTL_FLV_LINK_UP 1232 #define E1000_PCS_LSTS_LINK_OK 1239 #define E1000_STATUS_FD 0x00000001 /* Full duplex.0=half,1=full */240 #define E1000_STATUS_LU 0x00000002 /* Link up.0=no,1=link */243 #define E1000_STATUS_FUNC_1 0x00000004 /* Function 1 */260 #define HALF_DUPLEX 1[all …]
240 static int debug = -1;347 pr_info("%-15s %08x %08x %08x %08x\n", rname, regs[0], regs[1], in igb_regdump()454 16, 1, buffer_info->skb->data, in igb_dump()477 * 63 1 0 in igb_dump()479 * 0 | Packet Buffer Address [63:1] |A0/NSE| in igb_dump()481 * 8 | Header Buffer Address [63:1] | DD | in igb_dump()539 16, 1, in igb_dump()570 * @state: I2C data value (0 or 1) to set690 #define Q_IDX_82576(i) (((i & 0x1) << 3) + (i >> 1))706 * is allocated queues 0 and 8, VF 1 queues 1 and 9, etc. in igb_cache_ring_register()[all …]
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