| /rk3399_ARM-atf/plat/mediatek/drivers/spm/mt8196/ |
| H A D | mt_vcore_dvfsrc_plat.c | 401 uint32_t mode, value; in spm_vcorefs_qos_mode() local
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| /rk3399_ARM-atf/plat/rockchip/rk3568/drivers/pmu/ |
| H A D | pmu.h | 104 #define WRITE_MASK_SET(value) ((value << 16) | value) argument
105 #define WRITE_MASK_CLR(value) ((value << 16)) argument
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| /rk3399_ARM-atf/drivers/marvell/comphy/ |
| H A D | phy-comphy-3700.c | 35 uint16_t value; member
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| /rk3399_ARM-atf/plat/mediatek/mt8183/drivers/gpio/ |
| H A D | mtgpio.c | 392 void mt_set_gpio_out(int gpio, int value) in mt_set_gpio_out()
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| /rk3399_ARM-atf/drivers/mmc/ |
| H A D | mmc.c | 144 static int mmc_set_ext_csd(unsigned int ext_cmd, unsigned int value) in mmc_set_ext_csd()
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| /rk3399_ARM-atf/drivers/st/rif/ |
| H A D | stm32mp2_risaf.c | 180 uint32_t value; in risaf_conf_protreg() local
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| /rk3399_ARM-atf/drivers/nxp/ddr/s32cc/ |
| H A D | ddr_utils.c | 668 uint16_t value, max = 0; in get_max_delay() local
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| /rk3399_ARM-atf/drivers/st/clk/ |
| H A D | stm32mp1_clk.c | 267 int clk_stm32_set_div(struct stm32_clk_priv *priv, uint32_t div_id, uint32_t value) in clk_stm32_set_div()
1579 uint32_t value; in stm32mp1_lse_enable() local
1736 uint32_t src, value; in stm32mp1_check_pll_conf() local
1859 uint32_t value; in stm32mp1_pll_config_output() local
1878 uint32_t src, value; in stm32mp1_pll_config() local
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| H A D | clk-stm32mp13.c | 1196 uint32_t *value) in clk_stm32_pll_compute_cfgr1()
1225 uint32_t value = 0; in clk_stm32_pll_compute_cfgr2() local
1239 uint32_t value = 0; in clk_stm32_pll_config_vco() local
1265 uint32_t value = 0; in clk_stm32_pll_config_csg() local
1287 uint32_t value = 0; in clk_stm32_pll_config_out() local
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| H A D | clk-stm32-core.c | 115 uint32_t value; in clk_oscillator_set_drive() local
768 int clk_stm32_set_div(struct stm32_clk_priv *priv, uint32_t div_id, uint32_t value) in clk_stm32_set_div()
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| /rk3399_ARM-atf/plat/nvidia/tegra/soc/t186/drivers/mce/ |
| H A D | ari.c | 547 void ari_misc_ccplex(uint32_t ari_base, uint32_t index, uint32_t value) in ari_misc_ccplex()
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| /rk3399_ARM-atf/plat/marvell/armada/a8k/common/ |
| H A D | plat_pm.c | 37 #define MVEBU_GPIO_VALUE(index, value) (value << (index % 32)) argument
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| /rk3399_ARM-atf/drivers/st/crypto/ |
| H A D | stm32_pka.c | 438 uint64_t value; in stm32_pka_ecdsa_verif_check_return() local
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| /rk3399_ARM-atf/lib/zlib/ |
| H A D | inflate.c | 223 int ZEXPORT inflatePrime(z_streamp strm, int bits, int value) { in inflatePrime()
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| /rk3399_ARM-atf/lib/el3_runtime/aarch64/ |
| H A D | context_mgmt.c | 2097 uint32_t value) in cm_write_scr_el3_bit()
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| /rk3399_ARM-atf/plat/hisilicon/hikey960/drivers/pwrc/ |
| H A D | hisi_pwrc.c | 166 unsigned int core, unsigned int value) in hisi_set_cluster_pwdn_flag()
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| /rk3399_ARM-atf/drivers/arm/ethosn/ |
| H A D | ethosn_smc.c | 115 #define SYSCTRL0_INITVTOR_ADDR(value) \ argument
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| /rk3399_ARM-atf/plat/rockchip/rk3576/drivers/pmu/ |
| H A D | pmu.c | 131 static inline void set_cpus_pwr_domain_cfg_info(uint32_t cpu_id, uint32_t value) in set_cpus_pwr_domain_cfg_info()
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| /rk3399_ARM-atf/lib/compiler-rt/builtins/ |
| H A D | assembly.h | 107 #define GNU_PROPERTY(type, value) \ argument
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| /rk3399_ARM-atf/lib/libfdt/ |
| H A D | fdt_overlay.c | 378 const char *value; in overlay_fixup_phandle() local
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| H A D | fdt_ro.c | 120 uint32_t value; in fdt_find_max_phandle() local
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| /rk3399_ARM-atf/plat/rockchip/rk3399/drivers/pmu/ |
| H A D | pmu.c | 480 static inline void set_cpus_pwr_domain_cfg_info(uint32_t cpu_id, uint32_t value) in set_cpus_pwr_domain_cfg_info()
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| /rk3399_ARM-atf/plat/rockchip/px30/drivers/pmu/ |
| H A D | pmu.c | 114 static inline void set_cpus_pwr_domain_cfg_info(uint32_t cpu_id, uint32_t value) in set_cpus_pwr_domain_cfg_info()
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| /rk3399_ARM-atf/include/drivers/ |
| H A D | usb_device.h | 121 uint16_t value; member
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| H A D | ufs.h | 447 uint8_t value; member
457 uint32_t value; /* little endian */ member
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