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Searched refs:u8SOGState (Results 1 – 11 of 11) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_ip.c676 MS_U8 u8SOGState; in Hal_SC_ip_sog_detect() local
682 u8SOGState = SC_R2BYTE(0,REG_SC_BK01_02_L)& 0x0070; in Hal_SC_ip_sog_detect()
684 if(u8SOGState & BIT(4)) in Hal_SC_ip_sog_detect()
687 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect in Hal_SC_ip_sog_detect()
688 u8SOGState |= 0x00; // switch to detect separated H/V Sync in Hal_SC_ip_sog_detect()
690 else if((u8SOGState & 0x60) == 0x40) in Hal_SC_ip_sog_detect()
693 u8SOGState &= ~0x70; in Hal_SC_ip_sog_detect()
694 u8SOGState |= 0x20; // switch to detect composite sync in Hal_SC_ip_sog_detect()
696 else if((u8SOGState & 0x60) == 0x20) in Hal_SC_ip_sog_detect()
700 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on in Hal_SC_ip_sog_detect()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_ip.c676 MS_U8 u8SOGState; in Hal_SC_ip_sog_detect() local
682 u8SOGState = SC_R2BYTE(0,REG_SC_BK01_02_L)& 0x0070; in Hal_SC_ip_sog_detect()
684 if(u8SOGState & BIT(4)) in Hal_SC_ip_sog_detect()
687 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect in Hal_SC_ip_sog_detect()
688 u8SOGState |= 0x00; // switch to detect separated H/V Sync in Hal_SC_ip_sog_detect()
690 else if((u8SOGState & 0x60) == 0x40) in Hal_SC_ip_sog_detect()
693 u8SOGState &= ~0x70; in Hal_SC_ip_sog_detect()
694 u8SOGState |= 0x20; // switch to detect composite sync in Hal_SC_ip_sog_detect()
696 else if((u8SOGState & 0x60) == 0x20) in Hal_SC_ip_sog_detect()
700 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on in Hal_SC_ip_sog_detect()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_ip.c753 MS_U8 u8SOGState; in Hal_SC_ip_sog_detect() local
761 u8SOGState = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L)& 0x0070; in Hal_SC_ip_sog_detect()
763 if(u8SOGState & BIT(4)) in Hal_SC_ip_sog_detect()
766 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect in Hal_SC_ip_sog_detect()
767 u8SOGState |= 0x00; // switch to detect separated H/V Sync in Hal_SC_ip_sog_detect()
769 else if((u8SOGState & 0x60) == 0x40) in Hal_SC_ip_sog_detect()
772 u8SOGState &= ~0x70; in Hal_SC_ip_sog_detect()
773 u8SOGState |= 0x20; // switch to detect composite sync in Hal_SC_ip_sog_detect()
775 else if((u8SOGState & 0x60) == 0x20) in Hal_SC_ip_sog_detect()
779 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on in Hal_SC_ip_sog_detect()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_ip.c800 MS_U8 u8SOGState; in Hal_SC_ip_sog_detect() local
808 u8SOGState = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L)& 0x0070; in Hal_SC_ip_sog_detect()
810 if(u8SOGState & BIT(4)) in Hal_SC_ip_sog_detect()
813 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect in Hal_SC_ip_sog_detect()
814 u8SOGState |= 0x00; // switch to detect separated H/V Sync in Hal_SC_ip_sog_detect()
816 else if((u8SOGState & 0x60) == 0x40) in Hal_SC_ip_sog_detect()
819 u8SOGState &= ~0x70; in Hal_SC_ip_sog_detect()
820 u8SOGState |= 0x20; // switch to detect composite sync in Hal_SC_ip_sog_detect()
822 else if((u8SOGState & 0x60) == 0x20) in Hal_SC_ip_sog_detect()
826 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on in Hal_SC_ip_sog_detect()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_ip.c753 MS_U8 u8SOGState; in Hal_SC_ip_sog_detect() local
761 u8SOGState = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L)& 0x0070; in Hal_SC_ip_sog_detect()
763 if(u8SOGState & BIT(4)) in Hal_SC_ip_sog_detect()
766 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect in Hal_SC_ip_sog_detect()
767 u8SOGState |= 0x00; // switch to detect separated H/V Sync in Hal_SC_ip_sog_detect()
769 else if((u8SOGState & 0x60) == 0x40) in Hal_SC_ip_sog_detect()
772 u8SOGState &= ~0x70; in Hal_SC_ip_sog_detect()
773 u8SOGState |= 0x20; // switch to detect composite sync in Hal_SC_ip_sog_detect()
775 else if((u8SOGState & 0x60) == 0x20) in Hal_SC_ip_sog_detect()
779 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on in Hal_SC_ip_sog_detect()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_ip.c753 MS_U8 u8SOGState; in Hal_SC_ip_sog_detect() local
761 u8SOGState = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L)& 0x0070; in Hal_SC_ip_sog_detect()
763 if(u8SOGState & BIT(4)) in Hal_SC_ip_sog_detect()
766 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect in Hal_SC_ip_sog_detect()
767 u8SOGState |= 0x00; // switch to detect separated H/V Sync in Hal_SC_ip_sog_detect()
769 else if((u8SOGState & 0x60) == 0x40) in Hal_SC_ip_sog_detect()
772 u8SOGState &= ~0x70; in Hal_SC_ip_sog_detect()
773 u8SOGState |= 0x20; // switch to detect composite sync in Hal_SC_ip_sog_detect()
775 else if((u8SOGState & 0x60) == 0x20) in Hal_SC_ip_sog_detect()
779 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on in Hal_SC_ip_sog_detect()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_ip.c757 MS_U8 u8SOGState; in Hal_SC_ip_sog_detect() local
765 u8SOGState = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L)& 0x0070; in Hal_SC_ip_sog_detect()
767 if(u8SOGState & BIT(4)) in Hal_SC_ip_sog_detect()
770 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect in Hal_SC_ip_sog_detect()
771 u8SOGState |= 0x00; // switch to detect separated H/V Sync in Hal_SC_ip_sog_detect()
773 else if((u8SOGState & 0x60) == 0x40) in Hal_SC_ip_sog_detect()
776 u8SOGState &= ~0x70; in Hal_SC_ip_sog_detect()
777 u8SOGState |= 0x20; // switch to detect composite sync in Hal_SC_ip_sog_detect()
779 else if((u8SOGState & 0x60) == 0x20) in Hal_SC_ip_sog_detect()
783 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on in Hal_SC_ip_sog_detect()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_ip.c756 MS_U8 u8SOGState; in Hal_SC_ip_sog_detect() local
764 u8SOGState = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L)& 0x0070; in Hal_SC_ip_sog_detect()
766 if(u8SOGState & BIT(4)) in Hal_SC_ip_sog_detect()
769 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect in Hal_SC_ip_sog_detect()
770 u8SOGState |= 0x00; // switch to detect separated H/V Sync in Hal_SC_ip_sog_detect()
772 else if((u8SOGState & 0x60) == 0x40) in Hal_SC_ip_sog_detect()
775 u8SOGState &= ~0x70; in Hal_SC_ip_sog_detect()
776 u8SOGState |= 0x20; // switch to detect composite sync in Hal_SC_ip_sog_detect()
778 else if((u8SOGState & 0x60) == 0x20) in Hal_SC_ip_sog_detect()
782 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on in Hal_SC_ip_sog_detect()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_ip.c757 MS_U8 u8SOGState; in Hal_SC_ip_sog_detect() local
765 u8SOGState = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L)& 0x0070; in Hal_SC_ip_sog_detect()
767 if(u8SOGState & BIT(4)) in Hal_SC_ip_sog_detect()
770 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect in Hal_SC_ip_sog_detect()
771 u8SOGState |= 0x00; // switch to detect separated H/V Sync in Hal_SC_ip_sog_detect()
773 else if((u8SOGState & 0x60) == 0x40) in Hal_SC_ip_sog_detect()
776 u8SOGState &= ~0x70; in Hal_SC_ip_sog_detect()
777 u8SOGState |= 0x20; // switch to detect composite sync in Hal_SC_ip_sog_detect()
779 else if((u8SOGState & 0x60) == 0x20) in Hal_SC_ip_sog_detect()
783 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on in Hal_SC_ip_sog_detect()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_ip.c756 MS_U8 u8SOGState; in Hal_SC_ip_sog_detect() local
764 u8SOGState = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L)& 0x0070; in Hal_SC_ip_sog_detect()
766 if(u8SOGState & BIT(4)) in Hal_SC_ip_sog_detect()
769 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect in Hal_SC_ip_sog_detect()
770 u8SOGState |= 0x00; // switch to detect separated H/V Sync in Hal_SC_ip_sog_detect()
772 else if((u8SOGState & 0x60) == 0x40) in Hal_SC_ip_sog_detect()
775 u8SOGState &= ~0x70; in Hal_SC_ip_sog_detect()
776 u8SOGState |= 0x20; // switch to detect composite sync in Hal_SC_ip_sog_detect()
778 else if((u8SOGState & 0x60) == 0x20) in Hal_SC_ip_sog_detect()
782 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on in Hal_SC_ip_sog_detect()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_ip.c753 MS_U8 u8SOGState; in Hal_SC_ip_sog_detect() local
761 u8SOGState = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_02_L)& 0x0070; in Hal_SC_ip_sog_detect()
763 if(u8SOGState & BIT(4)) in Hal_SC_ip_sog_detect()
766 u8SOGState &= ~0x70; // set BIT[6..4] to 0 to turn off SOG detect in Hal_SC_ip_sog_detect()
767 u8SOGState |= 0x00; // switch to detect separated H/V Sync in Hal_SC_ip_sog_detect()
769 else if((u8SOGState & 0x60) == 0x40) in Hal_SC_ip_sog_detect()
772 u8SOGState &= ~0x70; in Hal_SC_ip_sog_detect()
773 u8SOGState |= 0x20; // switch to detect composite sync in Hal_SC_ip_sog_detect()
775 else if((u8SOGState & 0x60) == 0x20) in Hal_SC_ip_sog_detect()
779 u8SOGState |= 0x70; // set BIT[6..4] to 0x7 to turn SOG detect on in Hal_SC_ip_sog_detect()
[all …]