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Searched refs:u32XCDeviceBankOffset (Results 1 – 20 of 20) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/drv/ace/include/
H A Dace_hwreg_utility2.h132 INTERFACE MS_U32 u32XCDeviceBankOffset[XC_ACE_SUPPORT_DEVICE_NUM]; variable
205 …( { RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) …
208 …( { RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) )…
211 …( { RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) …
212 …RIU_WRITE_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) + 2 …
215 …FFFF) + (u32XCDeviceBankOffset[u32Id] << 8) ) << 1 ) | (MS_U32)(RIU_READ_2BYTE( (REG_SCALER_BASE +…
218 …( { RIU_READ_2BYTE( (REG_SCALER_BASE + ((u32Reg) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) )…
221 …) & 0xFFFF) + (u32XCDeviceBankOffset[u32Id] << 8) ) << 1, (RIU_READ_2BYTE( (REG_SCALER_BASE + ((u3…
225 …IU_WRITE_2BYTE(REG_SCALER_BASE << 1, (((u32Reg) >> 8) & 0x00FF) + u32XCDeviceBankOffset[u32Id] ) ;…
229 …U_WRITE_2BYTE(REG_SCALER_BASE << 1, ( ((u32Reg) >> 8) & 0x00FF) + u32XCDeviceBankOffset[u32Id] ) ;…
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/
H A Dmhal_ace.c1762 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_SUPPORT_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
1763 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
1764 …u32XCDeviceBankOffset[XC_ACE_DEVICE1] = E_HALACE_DEVICE1_XC_BANK_OFFSET; // Set SC1 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/ace/
H A Dmhal_ace.c1762 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_SUPPORT_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
1763 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
1764 …u32XCDeviceBankOffset[XC_ACE_DEVICE1] = E_HALACE_DEVICE1_XC_BANK_OFFSET; // Set SC1 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/
H A Dmhal_ace.c1762 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_SUPPORT_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
1763 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
1764 …u32XCDeviceBankOffset[XC_ACE_DEVICE1] = E_HALACE_DEVICE1_XC_BANK_OFFSET; // Set SC1 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/ace/
H A Dmhal_ace.c1762 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_SUPPORT_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
1763 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
1764 …u32XCDeviceBankOffset[XC_ACE_DEVICE1] = E_HALACE_DEVICE1_XC_BANK_OFFSET; // Set SC1 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/ace/include/
H A DMsAce_LIB_Group_DTV1.h187 MDrv_WriteByte(REG_ADDR_SC_BANK_SEL, bank + u32XCDeviceBankOffset[u32MsACEID])
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/include/
H A DMsAce_LIB_Group_DTV1.h187 MDrv_WriteByte(REG_ADDR_SC_BANK_SEL, bank + u32XCDeviceBankOffset[u32MsACEID])
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/ace/include/
H A DMsAce_LIB_Group_DTV1.h187 MDrv_WriteByte(REG_ADDR_SC_BANK_SEL, bank + u32XCDeviceBankOffset[u32MsACEID])
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A DMsAce_LIB_Group_DTV1.h187 MDrv_WriteByte(REG_ADDR_SC_BANK_SEL, bank + u32XCDeviceBankOffset[u32MsACEID])
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/
H A Dmhal_ace.c1873 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_MAX_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
1874 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/
H A Dmhal_ace.c1873 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_MAX_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
1874 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/ace/
H A Dmhal_ace.c2048 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_MAX_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
2049 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/ace/
H A Dmhal_ace.c2305 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_MAX_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
2306 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/ace/
H A Dmhal_ace.c2361 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_MAX_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
2362 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/ace/
H A Dmhal_ace.c2286 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_MAX_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
2287 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/
H A Dmhal_ace.c2286 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_MAX_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
2287 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/ace/
H A Dmhal_ace.c2396 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_MAX_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
2397 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/ace/
H A Dmhal_ace.c2396 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_MAX_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
2397 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/ace/
H A Dmhal_ace.c2815 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_MAX_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
2816 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/ace/
H A Dmhal_ace.c2815 memset(u32XCDeviceBankOffset, 0, sizeof(MS_U32)*XC_ACE_MAX_DEVICE_NUM); in Hal_ACE_Set_Device_Bank_Offset()
2816 …u32XCDeviceBankOffset[XC_ACE_DEVICE0] = E_HALACE_DEVICE0_XC_BANK_OFFSET; // Set SC0 reg bank offset in Hal_ACE_Set_Device_Bank_Offset()