| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/ |
| H A D | mvideo_context.h | 559 MS_PHY u32BWR_Miu_Right_OPMBase0; member
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_sc.c | 6031 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 6032 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 6163 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 6164 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_sc.c | 6168 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 6169 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 6300 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 6301 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_sc.c | 7270 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 7271 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 7403 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 7404 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_sc.c | 7878 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 7879 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 8059 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8060 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_sc.c | 8081 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 8082 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 8217 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8218 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_sc.c | 8778 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 8779 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 8954 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8955 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_sc.c | 8801 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 8802 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 8938 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8939 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_sc.c | 9059 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 9060 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 9235 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 9236 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_sc.c | 9060 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 9061 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 9196 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 9197 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/ |
| H A D | mdrv_sc_scaling.c.0 | 9440 pSrcInfo->Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0 = u32OPMBase0; 9463 pSrcInfo->Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0 = u32OPMBase0; 9467 …printf("eBPPType: %d u32BWR_Miu_Right_OPMBase0: 0x%x.\n", eBPPType, pSrcInfo->Status2.stBWRBase[eB…
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| H A D | mdrv_sc_scaling.c | 9469 pSrcInfo->Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0 = u32OPMBase0; in _MDrv_SC_set_fetch_number_limit_impl() 9492 pSrcInfo->Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_OPMBase0 = u32OPMBase0; in _MDrv_SC_set_fetch_number_limit_impl()
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