| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/ |
| H A D | mvideo_context.h | 557 MS_PHY u32BWR_Miu_Right_DNRBase1; member
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_sc.c | 6026 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address() 6027 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address() 6156 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 6157 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_sc.c | 6163 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address() 6164 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address() 6293 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 6294 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_sc.c | 7265 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address() 7266 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address() 7396 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 7397 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_sc.c | 7873 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address() 7874 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address() 8052 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8053 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_sc.c | 8076 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address() 8077 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address() 8210 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8211 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_sc.c | 8773 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address() 8774 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address() 8947 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8948 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_sc.c | 8796 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address() 8797 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address() 8931 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8932 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_sc.c | 9054 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address() 9055 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address() 9228 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 9229 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_sc.c | 9055 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address() 9056 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address() 9189 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 9190 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
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| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/ |
| H A D | mdrv_sc_scaling.c | 9484 pSrcInfo->Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1 = u32DNRBase1; in _MDrv_SC_set_fetch_number_limit_impl()
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| H A D | mdrv_sc_scaling.c.0 | 9455 pSrcInfo->Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase1 = u32DNRBase1;
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