| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/ |
| H A D | mvideo_context.h | 555 MS_PHY u32BWR_Miu_Right_DNRBase0; member
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_sc.c | 6021 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 6022 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 6149 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 6150 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_sc.c | 6158 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 6159 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 6286 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 6287 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_sc.c | 7260 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 7261 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 7389 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 7390 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_sc.c | 7868 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 7869 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 8045 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8046 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_sc.c | 8071 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 8072 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 8203 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8204 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_sc.c | 8768 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 8769 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 8940 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8941 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_sc.c | 8791 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 8792 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 8924 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 8925 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_sc.c | 9049 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 9050 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 9221 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 9222 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_sc.c | 9050 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address() 9051 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address() 9182 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>00), 0x… in _HAL_SC_BWR_set_base_address_burst() 9183 …x * 2)), (MS_U16)(gSrcInfo[eWindow].Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0>>16), 0x… in _HAL_SC_BWR_set_base_address_burst()
|
| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/ |
| H A D | mdrv_sc_scaling.c.0 | 9454 pSrcInfo->Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0 = u32DNRBase0; 9466 …printf("eBPPType: %d u32BWR_Miu_Right_DNRBase0: 0x%x.\n", eBPPType, pSrcInfo->Status2.stBWRBase[eB…
|
| H A D | mdrv_sc_scaling.c | 9483 pSrcInfo->Status2.stBWRBase[eBPPType].u32BWR_Miu_Right_DNRBase0 = u32DNRBase0; in _MDrv_SC_set_fetch_number_limit_impl()
|