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Searched refs:phyMiuOffsetFQBuf (Results 1 – 4 of 4) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dmx/hal/kano/fq/
H A DhalFQ.c150 MS_PHY phyMiuOffsetFQBuf = 0; in HAL_FQ_PVR_SetBuf() local
151 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetFQBuf, u32StartAddr); in HAL_FQ_PVR_SetBuf()
153 MS_PHYADDR u32EndAddr = phyMiuOffsetFQBuf + u32BufSize; in HAL_FQ_PVR_SetBuf()
154 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
156 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/fq/
H A DhalFQ.c149 MS_PHY phyMiuOffsetFQBuf = 0; in HAL_FQ_PVR_SetBuf() local
150 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetFQBuf, u32StartAddr); in HAL_FQ_PVR_SetBuf()
152 MS_PHYADDR u32EndAddr = phyMiuOffsetFQBuf + u32BufSize; in HAL_FQ_PVR_SetBuf()
153 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
155 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k6/fq/
H A DhalFQ.c149 MS_PHY phyMiuOffsetFQBuf = 0; in HAL_FQ_PVR_SetBuf() local
150 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetFQBuf, u32StartAddr); in HAL_FQ_PVR_SetBuf()
152 MS_PHYADDR u32EndAddr = phyMiuOffsetFQBuf + u32BufSize; in HAL_FQ_PVR_SetBuf()
153 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
155 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
/utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/fq/
H A DhalFQ.c149 MS_PHY phyMiuOffsetFQBuf = 0; in HAL_FQ_PVR_SetBuf() local
150 _phy_to_miu_offset(u8MiuSel, phyMiuOffsetFQBuf, u32StartAddr); in HAL_FQ_PVR_SetBuf()
152 MS_PHYADDR u32EndAddr = phyMiuOffsetFQBuf + u32BufSize; in HAL_FQ_PVR_SetBuf()
153 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_head), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()
155 FQ32_W(&(_REGFIQ[u32FQEng].str2mi_mid), MIU_FQ(phyMiuOffsetFQBuf) & FIQ_STR2MI2_ADDR_MASK); in HAL_FQ_PVR_SetBuf()