| /utopia/UTPA2-700.0.x/modules/cmdq/drv/cmdq/ |
| H A D | drvCMDQ.c | 197 #define CMDQ_MUTEX_CREATE(hnd) _ctx[hnd].mutex = MsOS_CreateMutex(E_MSOS_FIFO, _ctx[hnd].m… argument 198 #define CMDQ_MUTEX_LOCK(hnd) MsOS_ObtainMutex(_ctx[hnd].mutex, MSOS_WAIT_FOREVER) argument 199 #define CMDQ_MUTEX_UNLOCK(hnd) MsOS_ReleaseMutex(_ctx[hnd].mutex) argument 200 #define CMDQ_MUTEX_DELETE(hnd) MsOS_DeleteMutex(_ctx[hnd].mutex) argument 327 static inline DRVCMDQ_RESULT IsHandleValid(int hnd) { in IsHandleValid() argument 328 if(hnd >= NUMBER_OF_CMDQ_HW || hnd < 0) { in IsHandleValid() 329 _err("Invalid Handle %d.\n", hnd); in IsHandleValid() 335 static inline void InsertOneCommand(int hnd, MS_U32 a, MS_U32 b, MS_U32 c, MS_U32 d, MS_U32 e, MS_U… in InsertOneCommand() argument 338 hnd, ((h&0xF0)>>4), a,b,c,d,e,f,g,h); in InsertOneCommand() 340 _ctx[hnd].buffer_wrptr[0] = a; in InsertOneCommand() [all …]
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| H A D | drvCMDQ_priv.h | 185 DRVCMDQ_RESULT MDrv_CMDQv2_Init(int hnd, MS_U32 miu); 186 DRVCMDQ_RESULT MDrv_CMDQv2_Start(int hnd, MS_BOOL bStart); 187 DRVCMDQ_RESULT MDrv_CMDQv2_Get_Memory_Size(int hnd, MS_PHY smalladdr, MS_PHY bigaddr, MS_U32 miu); 188 DRVCMDQ_RESULT MDrv_CMDQv2_Set_Buffer(int hnd, MS_PHY startaddr, MS_PHY endaddr); 189 DRVCMDQ_RESULT MDrv_CMDQv2_Reset(int hnd); 190 DRVCMDQ_RESULT MDrv_CMDQv2_Exit(int hnd); 191 DRVCMDQ_RESULT MDrv_CMDQv2_Stop(int hnd); 192 DRVCMDQ_RESULT MDrv_CMDQv2_Receive(int hnd, CH_Struct_Pointer iphead); 193 void MDrv_CMDQv2_Insert_Redundant_Null(int hnd, MS_U32 n); 194 void MDrv_CMDQv2_Transfer(int hnd, CAF_Struct_Pointer cmdarray, MS_SIZE size); [all …]
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| /utopia/UTPA2-700.0.x/modules/cmdq/hal/curry/cmdq/ |
| H A D | halCMDQ.c | 169 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr) in HAL_CMDQ_SetBank() argument 171 _u32RegBase[hnd] = u32BankAddr; in HAL_CMDQ_SetBank() 172 if(hnd == 0) in HAL_CMDQ_SetBank() 174 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE); in HAL_CMDQ_SetBank() 177 else if (hnd == 1) in HAL_CMDQ_SetBank() 179 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE2); in HAL_CMDQ_SetBank() 184 _cri("INVALID HANDLE! %d\n", hnd); in HAL_CMDQ_SetBank() 188 …*(MS_U32 *)(_u32RegBase[hnd] + 0x0025C) = 0x0001; // 0x2 0025C, open this for using write_mask(SN… in HAL_CMDQ_SetBank() 190 …*(MS_U32 *)(_u32RegBase[hnd] + 0x47204UL) = 0x0000; // 0x2 47204, Enable CMDQ wirte RIU 0x247204… in HAL_CMDQ_SetBank() 200 void HAL_CMDQ_Enable(MS_U32 hnd) in HAL_CMDQ_Enable() argument [all …]
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| H A D | halCMDQ.h | 140 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr); 141 void HAL_CMDQ_Enable(MS_U32 hnd); 142 void HAL_CMDQ_Stop(MS_U32 hnd); 143 void HAL_CMDQ_Reset(MS_U32 hnd); 144 void HAL_CMDQ_Set_Miu_Length(MS_U32 hnd, MS_U32 value); 145 void HAL_CMDQ_Set_Miu_Request(MS_U32 hnd, MS_U32 value); 146 MS_BOOL HAL_CMDQ_Set_Mode(MS_U32 hnd, MS_U32 ModeSel); 147 void HAL_CMDQ_Set_Start_Pointer(MS_U32 hnd, MS_PHY StartAddr); 148 void HAL_CMDQ_Set_End_Pointer(MS_U32 hnd, MS_PHY EndAddr); 149 void HAL_CMDQ_Set_Offset_Pointer(MS_U32 hnd, MS_U32 OffsetAddr); [all …]
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| /utopia/UTPA2-700.0.x/modules/cmdq/hal/kano/cmdq/ |
| H A D | halCMDQ.c | 169 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr) in HAL_CMDQ_SetBank() argument 171 _u32RegBase[hnd] = u32BankAddr; in HAL_CMDQ_SetBank() 172 if(hnd == 0) in HAL_CMDQ_SetBank() 174 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE); in HAL_CMDQ_SetBank() 177 else if (hnd == 1) in HAL_CMDQ_SetBank() 179 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE2); in HAL_CMDQ_SetBank() 184 _cri("INVALID HANDLE! %d\n", hnd); in HAL_CMDQ_SetBank() 188 …*(MS_U32 *)(_u32RegBase[hnd] + 0x0025C) = 0x0001; // 0x2 0025C, open this for using write_mask(SN… in HAL_CMDQ_SetBank() 190 …*(MS_U32 *)(_u32RegBase[hnd] + 0x47204UL) = 0x0000; // 0x2 47204, Enable CMDQ wirte RIU 0x247204… in HAL_CMDQ_SetBank() 200 void HAL_CMDQ_Enable(MS_U32 hnd) in HAL_CMDQ_Enable() argument [all …]
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| H A D | halCMDQ.h | 139 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr); 140 void HAL_CMDQ_Enable(MS_U32 hnd); 141 void HAL_CMDQ_Stop(MS_U32 hnd); 142 void HAL_CMDQ_Reset(MS_U32 hnd); 143 void HAL_CMDQ_Set_Miu_Length(MS_U32 hnd, MS_U32 value); 144 void HAL_CMDQ_Set_Miu_Request(MS_U32 hnd, MS_U32 value); 145 MS_BOOL HAL_CMDQ_Set_Mode(MS_U32 hnd, MS_U32 ModeSel); 146 void HAL_CMDQ_Set_Start_Pointer(MS_U32 hnd, MS_PHY StartAddr); 147 void HAL_CMDQ_Set_End_Pointer(MS_U32 hnd, MS_PHY EndAddr); 148 void HAL_CMDQ_Set_Offset_Pointer(MS_U32 hnd, MS_U32 OffsetAddr); [all …]
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| /utopia/UTPA2-700.0.x/modules/cmdq/hal/maxim/cmdq/ |
| H A D | halCMDQ.c | 165 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr) in HAL_CMDQ_SetBank() argument 167 _u32RegBase[hnd] = u32BankAddr; in HAL_CMDQ_SetBank() 168 if(hnd == 0) in HAL_CMDQ_SetBank() 170 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE); in HAL_CMDQ_SetBank() 172 else if (hnd == 1) in HAL_CMDQ_SetBank() 174 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE2); in HAL_CMDQ_SetBank() 178 _cri("INVALID HANDLE! %d\n", hnd); in HAL_CMDQ_SetBank() 182 …*(MS_U32 *)(_u32RegBase[hnd] + 0x0025C) = 0x0001; // 0x2 0025C, open this for using write_mask(SN… in HAL_CMDQ_SetBank() 184 …*(MS_U32 *)(_u32RegBase[hnd] + 0x47204UL) = 0x0000; // 0x2 47204, Enable CMDQ wirte RIU 0x247204… in HAL_CMDQ_SetBank() 194 void HAL_CMDQ_Enable(MS_U32 hnd) in HAL_CMDQ_Enable() argument [all …]
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| H A D | halCMDQ.h | 139 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr); 140 void HAL_CMDQ_Enable(MS_U32 hnd); 141 void HAL_CMDQ_Stop(MS_U32 hnd); 142 void HAL_CMDQ_Reset(MS_U32 hnd); 143 void HAL_CMDQ_Set_Miu_Length(MS_U32 hnd, MS_U32 value); 144 void HAL_CMDQ_Set_Miu_Request(MS_U32 hnd, MS_U32 value); 145 MS_BOOL HAL_CMDQ_Set_Mode(MS_U32 hnd, MS_U32 ModeSel); 146 void HAL_CMDQ_Set_Start_Pointer(MS_U32 hnd, MS_PHY StartAddr); 147 void HAL_CMDQ_Set_End_Pointer(MS_U32 hnd, MS_PHY EndAddr); 148 void HAL_CMDQ_Set_Offset_Pointer(MS_U32 hnd, MS_U32 OffsetAddr); [all …]
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| /utopia/UTPA2-700.0.x/modules/cmdq/hal/M7621/cmdq/ |
| H A D | halCMDQ.c | 165 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr) in HAL_CMDQ_SetBank() argument 167 _u32RegBase[hnd] = u32BankAddr; in HAL_CMDQ_SetBank() 168 if(hnd == 0) in HAL_CMDQ_SetBank() 170 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE); in HAL_CMDQ_SetBank() 172 else if (hnd == 1) in HAL_CMDQ_SetBank() 174 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE2); in HAL_CMDQ_SetBank() 178 _cri("INVALID HANDLE! %d\n", hnd); in HAL_CMDQ_SetBank() 182 …*(MS_U32 *)(_u32RegBase[hnd] + 0x0025C) = 0x0001; // 0x2 0025C, open this for using write_mask(SN… in HAL_CMDQ_SetBank() 184 …*(MS_U32 *)(_u32RegBase[hnd] + 0x47204UL) = 0x0000; // 0x2 47204, Enable CMDQ wirte RIU 0x247204… in HAL_CMDQ_SetBank() 194 void HAL_CMDQ_Enable(MS_U32 hnd) in HAL_CMDQ_Enable() argument [all …]
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| H A D | halCMDQ.h | 139 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr); 140 void HAL_CMDQ_Enable(MS_U32 hnd); 141 void HAL_CMDQ_Stop(MS_U32 hnd); 142 void HAL_CMDQ_Reset(MS_U32 hnd); 143 void HAL_CMDQ_Set_Miu_Length(MS_U32 hnd, MS_U32 value); 144 void HAL_CMDQ_Set_Miu_Request(MS_U32 hnd, MS_U32 value); 145 MS_BOOL HAL_CMDQ_Set_Mode(MS_U32 hnd, MS_U32 ModeSel); 146 void HAL_CMDQ_Set_Start_Pointer(MS_U32 hnd, MS_PHY StartAddr); 147 void HAL_CMDQ_Set_End_Pointer(MS_U32 hnd, MS_PHY EndAddr); 148 void HAL_CMDQ_Set_Offset_Pointer(MS_U32 hnd, MS_U32 OffsetAddr); [all …]
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| /utopia/UTPA2-700.0.x/modules/cmdq/hal/k6lite/cmdq/ |
| H A D | halCMDQ.c | 168 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr) in HAL_CMDQ_SetBank() argument 170 _u32RegBase[hnd] = u32BankAddr; in HAL_CMDQ_SetBank() 171 if(hnd == 0) in HAL_CMDQ_SetBank() 173 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE); in HAL_CMDQ_SetBank() 177 _cri("INVALID HANDLE! %d\n", hnd); in HAL_CMDQ_SetBank() 181 …*(MS_U32 *)(_u32RegBase[hnd] + 0x0025C) = 0x0001; // 0x2 0025C, open this for using write_mask(SN… in HAL_CMDQ_SetBank() 183 …*(MS_U32 *)(_u32RegBase[hnd] + 0x47204UL) = 0x0000; // 0x2 47204, Enable CMDQ wirte RIU 0x247204… in HAL_CMDQ_SetBank() 193 void HAL_CMDQ_Enable(MS_U32 hnd) in HAL_CMDQ_Enable() argument 195 …REG32_W((&_CMDQCtrl[hnd]->CMDQ_Enable), _CMDQ_REG32_R(&_CMDQCtrl[hnd]->CMDQ_Enable) | (CMDQ_CMDQ_E… in HAL_CMDQ_Enable() 196 …REG32_W((&_CMDQCtrl[hnd]->CMDQ_Length_ReadMode), _CMDQ_REG32_R(&_CMDQCtrl[hnd]->CMDQ_Length_ReadMo… in HAL_CMDQ_Enable() [all …]
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| H A D | halCMDQ.h | 139 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr); 140 void HAL_CMDQ_Enable(MS_U32 hnd); 141 void HAL_CMDQ_Stop(MS_U32 hnd); 142 void HAL_CMDQ_Reset(MS_U32 hnd); 143 void HAL_CMDQ_Set_Miu_Length(MS_U32 hnd, MS_U32 value); 144 void HAL_CMDQ_Set_Miu_Request(MS_U32 hnd, MS_U32 value); 145 MS_BOOL HAL_CMDQ_Set_Mode(MS_U32 hnd, MS_U32 ModeSel); 146 void HAL_CMDQ_Set_Start_Pointer(MS_U32 hnd, MS_PHY StartAddr); 147 void HAL_CMDQ_Set_End_Pointer(MS_U32 hnd, MS_PHY EndAddr); 148 void HAL_CMDQ_Set_Offset_Pointer(MS_U32 hnd, MS_U32 OffsetAddr); [all …]
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| /utopia/UTPA2-700.0.x/modules/cmdq/hal/k6/cmdq/ |
| H A D | halCMDQ.c | 169 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr) in HAL_CMDQ_SetBank() argument 171 _u32RegBase[hnd] = u32BankAddr; in HAL_CMDQ_SetBank() 172 if(hnd == 0) in HAL_CMDQ_SetBank() 174 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE); in HAL_CMDQ_SetBank() 178 _cri("INVALID HANDLE! %d\n", hnd); in HAL_CMDQ_SetBank() 182 …*(MS_U32 *)(_u32RegBase[hnd] + 0x0025C) = 0x0001; // 0x2 0025C, open this for using write_mask(SN… in HAL_CMDQ_SetBank() 184 …*(MS_U32 *)(_u32RegBase[hnd] + 0x47204UL) = 0x0000; // 0x2 47204, Enable CMDQ wirte RIU 0x247204… in HAL_CMDQ_SetBank() 194 void HAL_CMDQ_Enable(MS_U32 hnd) in HAL_CMDQ_Enable() argument 196 …REG32_W((&_CMDQCtrl[hnd]->CMDQ_Enable), _CMDQ_REG32_R(&_CMDQCtrl[hnd]->CMDQ_Enable) | (CMDQ_CMDQ_E… in HAL_CMDQ_Enable() 197 …REG32_W((&_CMDQCtrl[hnd]->CMDQ_Length_ReadMode), _CMDQ_REG32_R(&_CMDQCtrl[hnd]->CMDQ_Length_ReadMo… in HAL_CMDQ_Enable() [all …]
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| H A D | halCMDQ.h | 139 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr); 140 void HAL_CMDQ_Enable(MS_U32 hnd); 141 void HAL_CMDQ_Stop(MS_U32 hnd); 142 void HAL_CMDQ_Reset(MS_U32 hnd); 143 void HAL_CMDQ_Set_Miu_Length(MS_U32 hnd, MS_U32 value); 144 void HAL_CMDQ_Set_Miu_Request(MS_U32 hnd, MS_U32 value); 145 MS_BOOL HAL_CMDQ_Set_Mode(MS_U32 hnd, MS_U32 ModeSel); 146 void HAL_CMDQ_Set_Start_Pointer(MS_U32 hnd, MS_PHY StartAddr); 147 void HAL_CMDQ_Set_End_Pointer(MS_U32 hnd, MS_PHY EndAddr); 148 void HAL_CMDQ_Set_Offset_Pointer(MS_U32 hnd, MS_U32 OffsetAddr); [all …]
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| /utopia/UTPA2-700.0.x/modules/cmdq/hal/M7821/cmdq/ |
| H A D | halCMDQ.c | 190 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr) in HAL_CMDQ_SetBank() argument 192 _u32RegBase[hnd] = u32BankAddr; in HAL_CMDQ_SetBank() 193 if(hnd == 0) in HAL_CMDQ_SetBank() 195 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE); in HAL_CMDQ_SetBank() 197 else if (hnd == 1) in HAL_CMDQ_SetBank() 199 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE2); in HAL_CMDQ_SetBank() 203 _cri("INVALID HANDLE! %d\n", hnd); in HAL_CMDQ_SetBank() 207 …*(MS_U32 *)(_u32RegBase[hnd] + 0x0025C) = 0x0001; // 0x2 0025C, open this for using write_mask(SN… in HAL_CMDQ_SetBank() 209 …*(MS_U32 *)(_u32RegBase[hnd] + 0x47204UL) = 0x0000; // 0x2 47204, Enable CMDQ wirte RIU 0x247204… in HAL_CMDQ_SetBank() 212 *(MS_U32 *)(_u32RegBase[hnd] + 0x46848UL) = 0x0008; in HAL_CMDQ_SetBank() [all …]
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| H A D | halCMDQ.h | 139 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr); 140 void HAL_CMDQ_Enable(MS_U32 hnd); 141 void HAL_CMDQ_Stop(MS_U32 hnd); 142 void HAL_CMDQ_Reset(MS_U32 hnd); 143 void HAL_CMDQ_Set_Miu_Length(MS_U32 hnd, MS_U32 value); 144 void HAL_CMDQ_Set_Miu_Request(MS_U32 hnd, MS_U32 value); 145 MS_BOOL HAL_CMDQ_Set_Mode(MS_U32 hnd, MS_U32 ModeSel); 146 void HAL_CMDQ_Set_Start_Pointer(MS_U32 hnd, MS_PHY StartAddr); 147 void HAL_CMDQ_Set_End_Pointer(MS_U32 hnd, MS_PHY EndAddr); 148 void HAL_CMDQ_Set_Offset_Pointer(MS_U32 hnd, MS_U32 OffsetAddr); [all …]
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| /utopia/UTPA2-700.0.x/modules/cmdq/hal/maserati/cmdq/ |
| H A D | halCMDQ.c | 190 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr) in HAL_CMDQ_SetBank() argument 192 _u32RegBase[hnd] = u32BankAddr; in HAL_CMDQ_SetBank() 193 if(hnd == 0) in HAL_CMDQ_SetBank() 195 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE); in HAL_CMDQ_SetBank() 197 else if (hnd == 1) in HAL_CMDQ_SetBank() 199 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE2); in HAL_CMDQ_SetBank() 203 _cri("INVALID HANDLE! %d\n", hnd); in HAL_CMDQ_SetBank() 207 …*(MS_U32 *)(_u32RegBase[hnd] + 0x0025C) = 0x0001; // 0x2 0025C, open this for using write_mask(SN… in HAL_CMDQ_SetBank() 209 …*(MS_U32 *)(_u32RegBase[hnd] + 0x47204UL) = 0x0000; // 0x2 47204, Enable CMDQ wirte RIU 0x247204… in HAL_CMDQ_SetBank() 212 *(MS_U32 *)(_u32RegBase[hnd] + 0x46848UL) = 0x0008; in HAL_CMDQ_SetBank() [all …]
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| H A D | halCMDQ.h | 139 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr); 140 void HAL_CMDQ_Enable(MS_U32 hnd); 141 void HAL_CMDQ_Stop(MS_U32 hnd); 142 void HAL_CMDQ_Reset(MS_U32 hnd); 143 void HAL_CMDQ_Set_Miu_Length(MS_U32 hnd, MS_U32 value); 144 void HAL_CMDQ_Set_Miu_Request(MS_U32 hnd, MS_U32 value); 145 MS_BOOL HAL_CMDQ_Set_Mode(MS_U32 hnd, MS_U32 ModeSel); 146 void HAL_CMDQ_Set_Start_Pointer(MS_U32 hnd, MS_PHY StartAddr); 147 void HAL_CMDQ_Set_End_Pointer(MS_U32 hnd, MS_PHY EndAddr); 148 void HAL_CMDQ_Set_Offset_Pointer(MS_U32 hnd, MS_U32 OffsetAddr); [all …]
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| /utopia/UTPA2-700.0.x/modules/cmdq/hal/manhattan/cmdq/ |
| H A D | halCMDQ.c | 163 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr) in HAL_CMDQ_SetBank() argument 165 _u32RegBase[hnd] = u32BankAddr; in HAL_CMDQ_SetBank() 166 if(hnd == 0) in HAL_CMDQ_SetBank() 168 _CMDQCtrl[hnd] = (REG_CMDQCtrl*)(_u32RegBase[hnd] + REG_CMDQCTRL_BASE); in HAL_CMDQ_SetBank() 172 _cri("INVALID HANDLE! %d\n", hnd); in HAL_CMDQ_SetBank() 178 …*(MS_U32 *)(_u32RegBase[hnd] + 0x47204UL) = 0x0000; // 0x2 47204, Enable CMDQ wirte RIU 0x247204… in HAL_CMDQ_SetBank() 188 void HAL_CMDQ_Enable(MS_U32 hnd) in HAL_CMDQ_Enable() argument 190 …REG32_W((&_CMDQCtrl[hnd]->CMDQ_Enable), _CMDQ_REG32_R(&_CMDQCtrl[hnd]->CMDQ_Enable) | (CMDQ_CMDQ_E… in HAL_CMDQ_Enable() 191 …REG32_W((&_CMDQCtrl[hnd]->CMDQ_Length_ReadMode), _CMDQ_REG32_R(&_CMDQCtrl[hnd]->CMDQ_Length_ReadMo… in HAL_CMDQ_Enable() 192 …REG32_W((&_CMDQCtrl[hnd]->CMDQ_Mask_Setting), _CMDQ_REG32_R(&_CMDQCtrl[hnd]->CMDQ_Mask_Setting) | … in HAL_CMDQ_Enable() [all …]
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| H A D | halCMDQ.h | 139 void HAL_CMDQ_SetBank(MS_U32 hnd, MS_VIRT u32BankAddr); 140 void HAL_CMDQ_Enable(MS_U32 hnd); 141 void HAL_CMDQ_Stop(MS_U32 hnd); 142 void HAL_CMDQ_Reset(MS_U32 hnd); 143 void HAL_CMDQ_Set_Miu_Length(MS_U32 hnd, MS_U32 value); 144 void HAL_CMDQ_Set_Miu_Request(MS_U32 hnd, MS_U32 value); 145 MS_BOOL HAL_CMDQ_Set_Mode(MS_U32 hnd, MS_U32 ModeSel); 146 void HAL_CMDQ_Set_Start_Pointer(MS_U32 hnd, MS_PHY StartAddr); 147 void HAL_CMDQ_Set_End_Pointer(MS_U32 hnd, MS_PHY EndAddr); 148 void HAL_CMDQ_Set_Offset_Pointer(MS_U32 hnd, MS_U32 OffsetAddr); [all …]
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