Searched refs:_RegVideoCtrl (Results 1 – 1 of 1) sorted by relevance
59 static REG_AV_ENG_Ctrl *_RegVideoCtrl = NULL; // Video variable202 …_RegVideoCtrl = (REG_AV_ENG_Ctrl*) (u32BankAddr + 0x400600UL); // Video … in HAL_TSP_SetBank()319 …REG16_SET(&_RegVideoCtrl[u8Idx].CFG_AV_00, (CFG_AV_00_REG_DUP_PKT_SKIP | CFG_AV_00_REG_PUSI_THREE_… in HAL_TSP_HwPatch()2619 …REG16_MSK_W(&_RegVideoCtrl[u8VideoFltIdx].CFG_AV_02, CFG_AV_02_REG_INPUT_SRC_MASK, ((MS_U16)pktDmx… in HAL_TSP_FIFO_SetSrc()2639 …*pktDmxId = ((REG16_R(&_RegVideoCtrl[u8VideoFltIdx].CFG_AV_02)) & CFG_AV_02_REG_INPUT_SRC_MASK) >>… in HAL_TSP_FIFO_GetSrc()2739 REG16_CLR(&_RegVideoCtrl[u8Idx].CFG_AV_00, CFG_AV_00_REG_PS_MODE); in HAL_TSP_FIFO_ClearAll()2764 REG16_SET(&_RegVideoCtrl[u8VideoFltIdx].CFG_AV_06, CFG_AV_06_REG_PES_RSEL); in HAL_TSP_FIFO_ReadEn()2768 REG16_CLR(&_RegVideoCtrl[u8VideoFltIdx].CFG_AV_06, CFG_AV_06_REG_PES_RSEL); in HAL_TSP_FIFO_ReadEn()2789 … return REG16_R(&_RegVideoCtrl[u8VideoFltIdx].CFG_AV_07) & CFG_AV_07_REG_DEBUG_FIFO_DATA_MASK; in HAL_TSP_FIFO_ReadPkt()2819 REG16_SET(&_RegVideoCtrl[u8VideoFltIdx].CFG_AV_06, CFG_AV_06_REG_FIFO_RD); in HAL_TSP_FIFO_Connect()[all …]