Searched refs:_RegSpdCtrl (Results 1 – 1 of 1) sorted by relevance
66 static REG_SPD_ENG_Ctrl *_RegSpdCtrl = NULL; // SPD variable198 …_RegSpdCtrl = (REG_SPD_ENG_Ctrl*) (u32BankAddr + 0xE1800UL); // SPD … in HAL_TSP_SetBank()4462 …REG16_SET(&_RegSpdCtrl[tsIf].CFG_SPD_05, CFG_SPD_05_REG_CTR_MODE_SPD_FILEIN); //set CTR mode ena… in HAL_TSP_FileIn_SPDConfig()4463 … REG16_W(&_RegSpdCtrl[tsIf].CFG_SPD_00_03[0], 0x0000); //set counter IV in HAL_TSP_FileIn_SPDConfig()4464 REG16_W(&_RegSpdCtrl[tsIf].CFG_SPD_00_03[1], 0x0000); in HAL_TSP_FileIn_SPDConfig()4465 REG16_W(&_RegSpdCtrl[tsIf].CFG_SPD_00_03[2], 0x0000); in HAL_TSP_FileIn_SPDConfig()4466 REG16_W(&_RegSpdCtrl[tsIf].CFG_SPD_00_03[3], 0x0000); in HAL_TSP_FileIn_SPDConfig()4467 …REG16_W(&_RegSpdCtrl[tsIf].CFG_SPD_04, CFG_SPD_04_CTR_IV_SPD_MAX_1K); //set counter IV m… in HAL_TSP_FileIn_SPDConfig()4468 … REG16_SET(&_RegSpdCtrl[tsIf].CFG_SPD_05, CFG_SPD_05_REG_LOAD_INIT_COUNTER_SPD); //load counter IV in HAL_TSP_FileIn_SPDConfig()4472 REG16_CLR(&_RegSpdCtrl[tsIf].CFG_SPD_05, CFG_SPD_05_REG_CTR_MODE_SPD_FILEIN); in HAL_TSP_FileIn_SPDConfig()