Home
last modified time | relevance | path

Searched refs:_MaskMiuReq_MVD_RW (Results 1 – 25 of 47) sorted by relevance

12

/utopia/UTPA2-700.0.x/modules/miu/hal/maldives/miu/
H A DhalMIU.h153 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/mooney/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/kano/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/k6/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/macan/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/curry/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/M7621/miu/
H A DhalMIU.h153 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/manhattan/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/k6lite/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/messi/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/M7821/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/k7u/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/mustang/miu/
H A DhalMIU.h153 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/mainz/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/maserati/miu/
H A DhalMIU.h155 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/miu/hal/maxim/miu/
H A DhalMIU.h153 #define _MaskMiuReq_MVD_RW( m ) do { _MaskMiuReq_MVD_R( m ); _MaskMiuReq_MVD_W( m ); } while (0) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/manhattan/hvd/
H A DhalHVD_sub.c199 #define _MaskMiuReq_MVD_RW( m ) _HVD_WriteRegBit(MIU0_REG_RQ3_MASK, m, BIT(4)) macro
H A DhalHVD.c204 #define _MaskMiuReq_MVD_RW( m ) _HVD_WriteRegBit(MIU0_REG_RQ2_MASK, m, BIT(4)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maserati/hvd/
H A DhalHVD_sub.c199 #define _MaskMiuReq_MVD_RW( m ) _HVD_WriteRegBit(MIU0_REG_RQ3_MASK, m, BIT(4)) macro
H A DhalHVD.c204 #define _MaskMiuReq_MVD_RW( m ) _HVD_WriteRegBit(MIU0_REG_RQ2_MASK, m, BIT(4)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/macan/hvd/
H A DhalHVD_sub.c199 #define _MaskMiuReq_MVD_RW( m ) _HVD_WriteRegBit(MIU0_REG_RQ3_MASK, m, BIT(4)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/maxim/hvd/
H A DhalHVD_sub.c199 #define _MaskMiuReq_MVD_RW( m ) _HVD_WriteRegBit(MIU0_REG_RQ3_MASK, m, BIT(4)) macro
H A DhalHVD.c204 #define _MaskMiuReq_MVD_RW( m ) _HVD_WriteRegBit(MIU0_REG_RQ2_MASK, m, BIT(4)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7621/hvd/
H A DhalHVD_sub.c199 #define _MaskMiuReq_MVD_RW( m ) _HVD_WriteRegBit(MIU0_REG_RQ3_MASK, m, BIT(4)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v1/hal/M7821/hvd/
H A DhalHVD_sub.c199 #define _MaskMiuReq_MVD_RW( m ) _HVD_WriteRegBit(MIU0_REG_RQ3_MASK, m, BIT(4)) macro

12