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Searched refs:_DMA_CTL_MIUCHSEL (Results 1 – 25 of 30) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/hwi2c/hal/k6lite/hwi2c/
H A DregHWI2C.h221 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
304 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
H A DhalHWI2C.c819 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CTL+u16PortOffset, _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
821 …HAL_HWI2C_WriteRegBitPM(REG_HWI2C_DMA_CTL_PM+PM_OFFSET(u16PortOffset), _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/kano/hwi2c/
H A DregHWI2C.h221 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
304 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
H A DhalHWI2C.c819 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CTL+u16PortOffset, _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
821 …HAL_HWI2C_WriteRegBitPM(REG_HWI2C_DMA_CTL_PM+PM_OFFSET(u16PortOffset), _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/k6/hwi2c/
H A DregHWI2C.h221 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
304 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
H A DhalHWI2C.c819 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CTL+u16PortOffset, _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
821 …HAL_HWI2C_WriteRegBitPM(REG_HWI2C_DMA_CTL_PM+PM_OFFSET(u16PortOffset), _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/curry/hwi2c/
H A DregHWI2C.h221 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
304 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
H A DhalHWI2C.c819 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CTL+u16PortOffset, _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
821 …HAL_HWI2C_WriteRegBitPM(REG_HWI2C_DMA_CTL_PM+PM_OFFSET(u16PortOffset), _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/mainz/hwi2c/
H A DregHWI2C.h197 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
H A DhalHWI2C.c599 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CTL+u32PortOffset, _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/mooney/hwi2c/
H A DregHWI2C.h219 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
H A DhalHWI2C.c597 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CTL+u32PortOffset, _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/mustang/hwi2c/
H A DregHWI2C.h217 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
H A DhalHWI2C.c592 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CTL+u32PortOffset, _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/messi/hwi2c/
H A DregHWI2C.h219 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
H A DhalHWI2C.c599 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CTL+u32PortOffset, _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/maldives/hwi2c/
H A DregHWI2C.h217 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
H A DhalHWI2C.c592 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CTL+u32PortOffset, _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/macan/hwi2c/
H A DregHWI2C.h219 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
H A DhalHWI2C.c597 return HAL_HWI2C_WriteRegBit(REG_HWI2C_DMA_CTL+u32PortOffset, _DMA_CTL_MIUCHSEL, bMiuCh1); in HAL_HWI2C_DMA_SetMiuChannel()
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/manhattan/hwi2c/
H A DregHWI2C.h237 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7821/hwi2c/
H A DregHWI2C.h237 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/maserati/hwi2c/
H A DregHWI2C.h237 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7621/hwi2c/
H A DregHWI2C.h237 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro
/utopia/UTPA2-700.0.x/modules/hwi2c/hal/maxim/hwi2c/
H A DregHWI2C.h237 #define _DMA_CTL_MIUCHSEL (__BIT7) //0: miu0, 1:miu1 macro

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