| /utopia/UTPA2-700.0.x/modules/mspi/hal/M7621/mspi/ |
| H A D | halMSPI.c | 40 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 41 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 57 MS_VIRT VirtClkBaseAddr; member 66 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 262 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK1; in HAL_MSPI_MMIOConfig() 267 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/M7821/mspi/ |
| H A D | halMSPI.c | 40 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 41 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 57 MS_VIRT VirtClkBaseAddr; member 66 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 262 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK1; in HAL_MSPI_MMIOConfig() 267 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/manhattan/mspi/ |
| H A D | halMSPI.c | 40 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 41 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 57 MS_VIRT VirtClkBaseAddr; member 66 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 262 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK1; in HAL_MSPI_MMIOConfig() 267 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/maxim/mspi/ |
| H A D | halMSPI.c | 40 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 41 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 57 MS_VIRT VirtClkBaseAddr; member 66 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 262 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK1; in HAL_MSPI_MMIOConfig() 267 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/maserati/mspi/ |
| H A D | halMSPI.c | 40 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 41 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 57 MS_VIRT VirtClkBaseAddr; member 66 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 262 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK1; in HAL_MSPI_MMIOConfig() 267 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/curry/mspi/ |
| H A D | halMSPI.c | 39 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 40 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 52 MS_VIRT VirtClkBaseAddr; member 61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 237 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/mooney/mspi/ |
| H A D | halMSPI.c | 39 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 40 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 52 MS_VIRT VirtClkBaseAddr; member 61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 250 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/k6lite/mspi/ |
| H A D | halMSPI.c | 39 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 40 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 52 MS_VIRT VirtClkBaseAddr; member 61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 237 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/k6/mspi/ |
| H A D | halMSPI.c | 39 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 40 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 52 MS_VIRT VirtClkBaseAddr; member 61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 237 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/macan/mspi/ |
| H A D | halMSPI.c | 39 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 40 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 52 MS_VIRT VirtClkBaseAddr; member 61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 250 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/messi/mspi/ |
| H A D | halMSPI.c | 41 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 42 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 55 MS_VIRT VirtClkBaseAddr; member 64 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 253 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/mainz/mspi/ |
| H A D | halMSPI.c | 41 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 42 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 55 MS_VIRT VirtClkBaseAddr; member 64 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 253 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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| /utopia/UTPA2-700.0.x/modules/mspi/hal/kano/mspi/ |
| H A D | halMSPI.c | 39 #define CLK_READ(addr) READ_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2)) 40 #define CLK_WRITE(addr, val) WRITE_WORD(_hal_msp.VirtClkBaseAddr + ((addr)<<2), (val… 52 MS_VIRT VirtClkBaseAddr; member 61 .VirtClkBaseAddr = BASEADDR_RIU + BK_CLK0 237 _hal_msp.VirtClkBaseAddr = u32NONPMRegBaseAddr + BK_CLK0; in HAL_MSPI_MMIOConfig()
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