Searched refs:VPU_EVDR2 (Results 1 – 2 of 2) sorted by relevance
| /utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/ |
| H A D | halVPU_EX.c | 258 #define _MaskMiuReq_VPU_D_RW(vpu,m) (vpu==VPU_EVDR2)?({_VPU_WriteRegBit(MIU0_REG_RQ0_MASK, m, BIT(…
259 #define _MaskMiuReq_VPU_Q_RW(vpu,m) (vpu==VPU_EVDR2)?({_VPU_WriteRegBit(MIU0_REG_RQ0_MASK, m, BIT(…
260 #define _MaskMiuReq_VPU_I_R(vpu,m) (vpu==VPU_EVDR2)?({_VPU_WriteRegBit(MIU0_REG_RQ0_MASK, m, BIT(…
262 #define _MaskMiu1Req_VPU_D_RW(vpu,m) (vpu==VPU_EVDR2)?({_VPU_WriteRegBit(MIU1_REG_RQ0_MASK, m, BIT(…
263 #define _MaskMiu1Req_VPU_Q_RW(vpu,m) (vpu==VPU_EVDR2)?({_VPU_WriteRegBit(MIU1_REG_RQ0_MASK, m, BIT(…
264 #define _MaskMiu1Req_VPU_I_R(vpu,m) (vpu==VPU_EVDR2)?({_VPU_WriteRegBit(MIU1_REG_RQ0_MASK, m, BIT(…
266 #define _MaskMiu2Req_VPU_D_RW(vpu,m) (vpu==VPU_EVDR2)?({_VPU_WriteRegBit(MIU2_REG_RQ0_MASK, m, BIT(…
267 #define _MaskMiu2Req_VPU_Q_RW(vpu,m) (vpu==VPU_EVDR2)?({_VPU_WriteRegBit(MIU2_REG_RQ0_MASK, m, BIT(…
268 #define _MaskMiu2Req_VPU_I_R(vpu,m) (vpu==VPU_EVDR2)?({_VPU_WriteRegBit(MIU2_REG_RQ0_MASK, m, BIT(…
272 #define VPU_D_RW_ON_MIU0(vpu) ((vpu==VPU_EVDR2)? …
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| H A D | regVPU_EX.h | 230 #define VPU_EVDR2 0 macro
238 #define VPU_BASE(vpu) ((vpu==VPU_EVDR2)?(REG_VPU_BASE):(REG_VPU_LITE_BASE))
239 #define MBX_BASE(vpu) ((vpu==VPU_EVDR2)?(REG_MBX_BASE):(REG_MBX_LITE_BASE))
249 #define MAU1_BASE(vpu) ((vpu==VPU_EVDR2)?(REG_MAU1_BASE):(REG_MAU1_LITE_BASE))
250 #define MAU1_LV2_0_BASE(vpu) ((vpu==VPU_EVDR2)?(REG_MAU1_LV2_0_BASE):(REG_MAU1_LITE_LV2_0_BASE))
251 #define MAU1_LV2_1_BASE(vpu) ((vpu==VPU_EVDR2)?(REG_MAU1_LV2_1_BASE):(REG_MAU1_LITE_LV2_1_BASE))
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