| /utopia/UTPA2-700.0.x/modules/mvop/hal/curry/mvop/ |
| H A D | halMVOP.c | 1063 HAL_WriteRegBit(VOP_REG_FRAME_RST+1, 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_SetInputMode()
1551 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1561 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
3192 HAL_WriteRegBit(VOP_REG_FRAME_RST+1, 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
3275 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST+1), 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
4751 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4759 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|
| H A D | regMVOP.h | 351 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6/mvop/ |
| H A D | halMVOP.c | 1048 HAL_WriteRegBit(VOP_REG_FRAME_RST+1, 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_SetInputMode()
1575 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1593 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
3245 HAL_WriteRegBit(VOP_REG_FRAME_RST+1, 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
3326 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST+1), 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
4982 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4998 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|
| H A D | regMVOP.h | 357 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/k6lite/mvop/ |
| H A D | halMVOP.c | 1039 HAL_WriteRegBit(VOP_REG_FRAME_RST+1, 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_SetInputMode()
1549 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1567 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
3200 HAL_WriteRegBit(VOP_REG_FRAME_RST+1, 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
3277 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST+1), 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
4744 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4760 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|
| H A D | regMVOP.h | 357 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/kastor/mvop/ |
| H A D | halMVOP.c | 1048 HAL_WriteRegBit(VOP_REG_FRAME_RST+1, 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_SetInputMode()
1540 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1550 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
3175 HAL_WriteRegBit(VOP_REG_FRAME_RST+1, 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
3257 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST+1), 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
4739 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4747 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|
| H A D | regMVOP.h | 354 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/kano/mvop/ |
| H A D | halMVOP.c | 1065 HAL_WriteRegBit(VOP_REG_FRAME_RST+1, 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_SetInputMode()
1553 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1563 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
3195 HAL_WriteRegBit(VOP_REG_FRAME_RST+1, 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
3279 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST+1), 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
4783 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4791 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|
| H A D | regMVOP.h | 352 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/k7u/mvop/ |
| H A D | halMVOP.c | 1519 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1537 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
3211 HAL_WriteRegBit(VOP_REG_FRAME_RST+1, 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
3312 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST+1), 0, BIT7); // reg_frame_rst = 0 in HAL_MVOP_ResetReg()
4943 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4959 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|
| H A D | regMVOP.h | 361 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/maldives/mvop/ |
| H A D | regMVOP.h | 312 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/mustang/mvop/ |
| H A D | regMVOP.h | 331 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| H A D | halMVOP.c | 1353 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
3865 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/macan/mvop/ |
| H A D | regMVOP.h | 337 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| H A D | halMVOP.c | 1506 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1514 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
4649 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4657 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/messi/mvop/ |
| H A D | regMVOP.h | 334 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| H A D | halMVOP.c | 1476 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1484 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
4794 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4802 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/manhattan/mvop/ |
| H A D | regMVOP.h | 333 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| H A D | halMVOP.c | 1444 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1452 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
4380 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4388 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/mainz/mvop/ |
| H A D | regMVOP.h | 334 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| H A D | halMVOP.c | 1476 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
1484 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
4789 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
4797 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|
| /utopia/UTPA2-700.0.x/modules/mvop/hal/M5621/mvop/ |
| H A D | regMVOP.h | 339 #define VOP_REG_FRAME_RST (MVOP_REG_BASE + 0x7E) //BIT15 macro
|
| H A D | halMVOP.c | 1417 HAL_WriteRegBit(VOP_REG_FRAME_RST, 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SetSynClk()
4371 HAL_WriteRegBit(SUB_REG(VOP_REG_FRAME_RST), 0, BIT15); // reg_frame_rst = 0 in HAL_MVOP_SubSetSynClk()
|