| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 3434 …W2BYTEMSK(REG_HDCP_DUAL_P0_68_L +dwBKOffset, BIT(15)| TMDS_HDCP2_SOURCE_READ_OFFSET, BIT(15)| BMAS… in Hal_HDCP22_PortInit() 3670 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3672 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3677 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3679 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_hdmi.c | 3345 …W2BYTEMSK(REG_HDCP_DUAL_P0_68_L +dwBKOffset, BIT(15)| TMDS_HDCP2_SOURCE_READ_OFFSET, BIT(15)| BMAS… in Hal_HDCP22_PortInit() 3607 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3609 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3614 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3616 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_hdmi.c | 3434 …W2BYTEMSK(REG_HDCP_DUAL_P0_68_L +dwBKOffset, BIT(15)| TMDS_HDCP2_SOURCE_READ_OFFSET, BIT(15)| BMAS… in Hal_HDCP22_PortInit() 3670 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3672 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3677 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3679 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_hdmi.c | 3329 …W2BYTEMSK(REG_HDCP_DUAL_P0_68_L +dwBKOffset, BIT(15)| TMDS_HDCP2_SOURCE_READ_OFFSET, BIT(15)| BMAS… in Hal_HDCP22_PortInit() 3563 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3565 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3570 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3572 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_hdmi.c | 3345 …W2BYTEMSK(REG_HDCP_DUAL_P0_68_L +dwBKOffset, BIT(15)| TMDS_HDCP2_SOURCE_READ_OFFSET, BIT(15)| BMAS… in Hal_HDCP22_PortInit() 3607 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3609 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3614 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3616 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_hdmi.c | 3518 …W2BYTEMSK(REG_HDCP_DUAL_P0_68_L +dwBKOffset, BIT(15)| TMDS_HDCP2_SOURCE_READ_OFFSET, BIT(15)| BMAS… in Hal_HDCP22_PortInit() 3752 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3754 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3759 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3761 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_hdmi.c | 3988 …W2BYTEMSK(REG_HDCP_DUAL_P0_68_L +dwBKOffset, BIT(15)| TMDS_HDCP2_SOURCE_READ_OFFSET, BIT(15)| BMAS… in Hal_HDCP22_PortInit() 4222 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 4224 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 4229 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 4231 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_hdmi.c | 3518 …W2BYTEMSK(REG_HDCP_DUAL_P0_68_L +dwBKOffset, BIT(15)| TMDS_HDCP2_SOURCE_READ_OFFSET, BIT(15)| BMAS… in Hal_HDCP22_PortInit() 3752 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3754 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3759 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg() 3761 …W2BYTEMSK(REG_HDCPKEY_04_L + ucRegOffset, ultemp +TMDS_HDCP2_SOURCE_READ_OFFSET, 0x7FF); //set add… in Hal_HDCP22_SendMsg()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | mhal_hdmi.h | 188 #define TMDS_HDCP2_SOURCE_READ_OFFSET 130U macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | mhal_hdmi.h | 188 #define TMDS_HDCP2_SOURCE_READ_OFFSET 130U macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | mhal_hdmi.h | 188 #define TMDS_HDCP2_SOURCE_READ_OFFSET 130U macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | mhal_hdmi.h | 188 #define TMDS_HDCP2_SOURCE_READ_OFFSET 130U macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | mhal_hdmi.h | 188 #define TMDS_HDCP2_SOURCE_READ_OFFSET 130U macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | mhal_hdmi.h | 188 #define TMDS_HDCP2_SOURCE_READ_OFFSET 130U macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | mhal_hdmi.h | 188 #define TMDS_HDCP2_SOURCE_READ_OFFSET 130U macro
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | mhal_hdmi.h | 190 #define TMDS_HDCP2_SOURCE_READ_OFFSET 130U macro
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