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Searched refs:TCF_CLK_54_MHZ (Results 1 – 12 of 12) sorted by relevance

/utopia/UTPA2-700.0.x/modules/dscmb/hal/M7621/tcf/
H A DhalTCF.c161 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)|TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
165 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)&~TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
H A DregTCF.h129 #define TCF_CLK_54_MHZ (0x00000001) // [0] 0: XTAL 12Mhz (default); 1: 54Mhz macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/maserati/tcf/
H A DhalTCF.c161 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)|TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
165 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)&~TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
H A DregTCF.h129 #define TCF_CLK_54_MHZ (0x00000001) // [0] 0: XTAL 12Mhz (default); 1: 54Mhz macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/manhattan/tcf/
H A DhalTCF.c161 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)|TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
165 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)&~TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
H A DregTCF.h129 #define TCF_CLK_54_MHZ (0x00000001) // [0] 0: XTAL 12Mhz (default); 1: 54Mhz macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/maxim/tcf/
H A DhalTCF.c161 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)|TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
165 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)&~TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
H A DregTCF.h129 #define TCF_CLK_54_MHZ (0x00000001) // [0] 0: XTAL 12Mhz (default); 1: 54Mhz macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/macan/tcf/
H A DhalTCF.c161 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)|TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
165 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)&~TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
H A DregTCF.h129 #define TCF_CLK_54_MHZ (0x00000001) // [0] 0: XTAL 12Mhz (default); 1: 54Mhz macro
/utopia/UTPA2-700.0.x/modules/dscmb/hal/M7821/tcf/
H A DhalTCF.c161 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)|TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
165 _REG32_W( Reg32_Clk_CF, (_REG32_R( Reg32_Clk_CF)&~TCF_CLK_54_MHZ)); in HAL_TCF_Clk()
H A DregTCF.h129 #define TCF_CLK_54_MHZ (0x00000001) // [0] 0: XTAL 12Mhz (default); 1: 54Mhz macro