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Searched refs:SC_W4BYTE (Results 1 – 25 of 90) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_dip.c383 SC_W4BYTE(0, REG_SC_BK34_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
384 SC_W4BYTE(0, REG_SC_BK34_08_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
395 SC_W4BYTE(0, REG_SC_BK3B_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
396 SC_W4BYTE(0, REG_SC_BK3B_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
407 SC_W4BYTE(0, REG_SC_BK3C_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
408 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
1509 SC_W4BYTE(0, REG_SC_BK36_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1617 SC_W4BYTE(0, REG_SC_BK3B_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1709 SC_W4BYTE(0, REG_SC_BK3C_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1751 SC_W4BYTE(0, REG_SC_BK36_60_L,u64OffSet); in HAL_XC_DIP_SetWinProperty1()
[all …]
H A Dmhal_sc.c741 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_40_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
742 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_42_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
750 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_44_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_write_limit()
751 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_46_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_write_limit()
788 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
789 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_4A_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_dual_write_limit()
1180 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK02_04_L, pDBreg->u32H_PreScalingRatio); in Hal_SC_sw_db()
1182 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK02_08_L, pDBreg->u32V_PreScalingRatio); in Hal_SC_sw_db()
1184 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK23_07_L, pDBreg->u32H_PostScalingRatio); in Hal_SC_sw_db()
1186 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK23_09_L, pDBreg->u32V_PostScalingRatio); in Hal_SC_sw_db()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_dip.c381 SC_W4BYTE(0, REG_SC_BK34_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
382 SC_W4BYTE(0, REG_SC_BK34_08_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
393 SC_W4BYTE(0, REG_SC_BK3B_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
394 SC_W4BYTE(0, REG_SC_BK3B_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
405 SC_W4BYTE(0, REG_SC_BK3C_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
406 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
1507 SC_W4BYTE(0, REG_SC_BK36_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1597 SC_W4BYTE(0, REG_SC_BK3B_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1689 SC_W4BYTE(0, REG_SC_BK3C_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1731 SC_W4BYTE(0, REG_SC_BK36_60_L,u64OffSet); in HAL_XC_DIP_SetWinProperty1()
[all …]
H A Dmhal_sc.c659 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_40_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
660 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_42_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
668 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_44_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_write_limit()
669 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_46_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_write_limit()
706 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
707 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_4A_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_dual_write_limit()
1084 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK02_04_L, pDBreg->u32H_PreScalingRatio); in Hal_SC_sw_db()
1086 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK02_08_L, pDBreg->u32V_PreScalingRatio); in Hal_SC_sw_db()
1088 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK23_07_L, pDBreg->u32H_PostScalingRatio); in Hal_SC_sw_db()
1090 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK23_09_L, pDBreg->u32V_PostScalingRatio); in Hal_SC_sw_db()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_dip.c293 SC_W4BYTE(0, REG_SC_BK34_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
294 SC_W4BYTE(0, REG_SC_BK34_08_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
305 SC_W4BYTE(0, REG_SC_BK3B_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
306 SC_W4BYTE(0, REG_SC_BK3B_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
1177 SC_W4BYTE(0, REG_SC_BK36_50_L,u32OffSet); in HAL_XC_DIP_SetWinProperty()
1224 SC_W4BYTE(0, REG_SC_BK3B_50_L,u32OffSet); in HAL_XC_DIP_SetWinProperty()
1252 SC_W4BYTE(0, REG_SC_BK36_60_L,u32OffSet); in HAL_XC_DIP_SetWinProperty1()
1256 SC_W4BYTE(0, REG_SC_BK3B_60_L,u32OffSet); in HAL_XC_DIP_SetWinProperty1()
1285 SC_W4BYTE(0, REG_SC_BK36_10_L, u32BufStart / u16BusSize); // input address0 in HAL_XC_DIP_SetBase0()
1289 SC_W4BYTE(0, REG_SC_BK36_30_L, u32BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
[all …]
H A Dmhal_sc.c559 SC_W4BYTE(0,REG_SC_BK0D_40_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
560 SC_W4BYTE(0,REG_SC_BK0D_42_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
565 SC_W4BYTE(0,REG_SC_BK0D_44_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_write_limit()
566 SC_W4BYTE(0,REG_SC_BK0D_46_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_write_limit()
843 SC_W4BYTE(0,REG_SC_BK02_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_sw_db()
844 SC_W4BYTE(0,REG_SC_BK02_08_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_sw_db()
846 SC_W4BYTE(0,REG_SC_BK23_07_L, pDBreg->u32H_PostScalingRatio); // H post-scaling in Hal_SC_sw_db()
847 SC_W4BYTE(0,REG_SC_BK23_09_L, pDBreg->u32V_PostScalingRatio); // V post-scaling in Hal_SC_sw_db()
850 SC_W4BYTE(0,REG_SC_BK12_1A_L, pDBreg->u32WritelimitBase); in Hal_SC_sw_db()
851 SC_W4BYTE(0,REG_SC_BK12_08_L, pDBreg->u32DNRBase0); // input address0 in Hal_SC_sw_db()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_dip.c312 SC_W4BYTE(0, REG_SC_BK34_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
313 SC_W4BYTE(0, REG_SC_BK34_08_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
324 SC_W4BYTE(0, REG_SC_BK3B_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
325 SC_W4BYTE(0, REG_SC_BK3B_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
1188 SC_W4BYTE(0, REG_SC_BK36_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1235 SC_W4BYTE(0, REG_SC_BK3B_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1263 SC_W4BYTE(0, REG_SC_BK36_60_L,u32OffSet); in HAL_XC_DIP_SetWinProperty1()
1267 SC_W4BYTE(0, REG_SC_BK3B_60_L,u32OffSet); in HAL_XC_DIP_SetWinProperty1()
1296 SC_W4BYTE(0, REG_SC_BK36_10_L, u32BufStart / u16BusSize); // input address0 in HAL_XC_DIP_SetBase0()
1300 SC_W4BYTE(0, REG_SC_BK36_30_L, u32BufEnd); // input address0 in HAL_XC_DIP_SetBase0()
[all …]
H A Dmhal_sc.c555 SC_W4BYTE(0,REG_SC_BK0D_40_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
556 SC_W4BYTE(0,REG_SC_BK0D_42_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
561 SC_W4BYTE(0,REG_SC_BK0D_44_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_write_limit()
562 SC_W4BYTE(0,REG_SC_BK0D_46_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_write_limit()
839 SC_W4BYTE(0,REG_SC_BK02_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_sw_db()
840 SC_W4BYTE(0,REG_SC_BK02_08_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_sw_db()
842 SC_W4BYTE(0,REG_SC_BK23_07_L, pDBreg->u32H_PostScalingRatio); // H post-scaling in Hal_SC_sw_db()
843 SC_W4BYTE(0,REG_SC_BK23_09_L, pDBreg->u32V_PostScalingRatio); // V post-scaling in Hal_SC_sw_db()
846 SC_W4BYTE(0,REG_SC_BK12_1A_L, pDBreg->u32WritelimitBase); in Hal_SC_sw_db()
847 SC_W4BYTE(0,REG_SC_BK12_08_L, pDBreg->u32DNRBase0); // input address0 in Hal_SC_sw_db()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_dip.c381 SC_W4BYTE(0, REG_SC_BK34_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
382 SC_W4BYTE(0, REG_SC_BK34_08_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
393 SC_W4BYTE(0, REG_SC_BK3B_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
394 SC_W4BYTE(0, REG_SC_BK3B_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
405 SC_W4BYTE(0, REG_SC_BK3C_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
406 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
1600 SC_W4BYTE(0, REG_SC_BK36_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1692 SC_W4BYTE(0, REG_SC_BK3B_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1784 SC_W4BYTE(0, REG_SC_BK3C_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1826 SC_W4BYTE(0, REG_SC_BK36_60_L,u64OffSet); in HAL_XC_DIP_SetWinProperty1()
[all …]
H A Dmhal_sc.c753 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
754 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_4A_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
759 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_40_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
760 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_42_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
769 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_44_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_write_limit()
770 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_46_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_write_limit()
790 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_64_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_frcm_write_limit()
791 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_66_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_frcm_write_limit()
796 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_68_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_frcm_write_limit()
797 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_6A_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_frcm_write_limit()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_dip.c536 SC_W4BYTE(0, REG_SC_BK34_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
537 SC_W4BYTE(0, REG_SC_BK34_08_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
548 SC_W4BYTE(0, REG_SC_BK3B_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
549 SC_W4BYTE(0, REG_SC_BK3B_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
560 SC_W4BYTE(0, REG_SC_BK3C_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
561 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
1782 SC_W4BYTE(0, REG_SC_BK36_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1875 SC_W4BYTE(0, REG_SC_BK3B_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1968 SC_W4BYTE(0, REG_SC_BK3C_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
2006 SC_W4BYTE(0, REG_SC_BK36_60_L,u64OffSet); in HAL_XC_DIP_SetWinProperty1()
[all …]
H A Dmhal_sc.c739 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_40_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
740 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_42_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
748 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_44_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_write_limit()
749 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_46_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_write_limit()
769 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_64_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_frcm_write_limit()
770 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_66_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_frcm_write_limit()
775 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_68_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_frcm_write_limit()
776 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_6A_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_frcm_write_limit()
806 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_dual_write_limit()
807 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_4A_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_dual_write_limit()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_dip.c505 SC_W4BYTE(0, REG_SC_BK34_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
506 SC_W4BYTE(0, REG_SC_BK34_08_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
517 SC_W4BYTE(0, REG_SC_BK3B_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
518 SC_W4BYTE(0, REG_SC_BK3B_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
529 SC_W4BYTE(0, REG_SC_BK3C_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
530 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
1906 SC_W4BYTE(0, REG_SC_BK36_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1998 SC_W4BYTE(0, REG_SC_BK3B_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
2090 SC_W4BYTE(0, REG_SC_BK3C_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
2132 SC_W4BYTE(0, REG_SC_BK36_60_L,u64OffSet); in HAL_XC_DIP_SetWinProperty1()
[all …]
H A Dmhal_adc.c1696 SC_W4BYTE(REG_SC_BK12_48_L, _stAutoAdcSetting.u32SC_BK12_08);
1697 SC_W4BYTE(REG_SC_BK12_4A_L, _stAutoAdcSetting.u32SC_BK12_0A);
1698 SC_W4BYTE(REG_SC_BK12_4C_L, _stAutoAdcSetting.u32SC_BK12_0C);
1699 SC_W4BYTE(REG_SC_BK12_50_L, _stAutoAdcSetting.u32SC_BK12_10);
1700 SC_W4BYTE(REG_SC_BK12_52_L, _stAutoAdcSetting.u32SC_BK12_12);
1701 SC_W4BYTE(REG_SC_BK12_54_L, _stAutoAdcSetting.u32SC_BK12_14);
1741 SC_W4BYTE(REG_SC_BK12_08_L, _stAutoAdcSetting.u32SC_BK12_08);
1742 SC_W4BYTE(REG_SC_BK12_0A_L, _stAutoAdcSetting.u32SC_BK12_0A);
1743 SC_W4BYTE(REG_SC_BK12_0C_L, _stAutoAdcSetting.u32SC_BK12_0C);
1744 SC_W4BYTE(REG_SC_BK12_10_L, _stAutoAdcSetting.u32SC_BK12_10);
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_dip.c507 SC_W4BYTE(0, REG_SC_BK34_04_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
508 SC_W4BYTE(0, REG_SC_BK34_08_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
519 SC_W4BYTE(0, REG_SC_BK3B_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
520 SC_W4BYTE(0, REG_SC_BK3B_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
531 SC_W4BYTE(0, REG_SC_BK3C_15_L, pDBreg->u32H_PreScalingRatio); // H pre-scaling in Hal_SC_DWIN_sw_db()
532 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
1908 SC_W4BYTE(0, REG_SC_BK36_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
2000 SC_W4BYTE(0, REG_SC_BK3B_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
2092 SC_W4BYTE(0, REG_SC_BK3C_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
2134 SC_W4BYTE(0, REG_SC_BK36_60_L,u64OffSet); in HAL_XC_DIP_SetWinProperty1()
[all …]
H A Dmhal_adc.c1696 SC_W4BYTE(REG_SC_BK12_48_L, _stAutoAdcSetting.u32SC_BK12_08);
1697 SC_W4BYTE(REG_SC_BK12_4A_L, _stAutoAdcSetting.u32SC_BK12_0A);
1698 SC_W4BYTE(REG_SC_BK12_4C_L, _stAutoAdcSetting.u32SC_BK12_0C);
1699 SC_W4BYTE(REG_SC_BK12_50_L, _stAutoAdcSetting.u32SC_BK12_10);
1700 SC_W4BYTE(REG_SC_BK12_52_L, _stAutoAdcSetting.u32SC_BK12_12);
1701 SC_W4BYTE(REG_SC_BK12_54_L, _stAutoAdcSetting.u32SC_BK12_14);
1741 SC_W4BYTE(REG_SC_BK12_08_L, _stAutoAdcSetting.u32SC_BK12_08);
1742 SC_W4BYTE(REG_SC_BK12_0A_L, _stAutoAdcSetting.u32SC_BK12_0A);
1743 SC_W4BYTE(REG_SC_BK12_0C_L, _stAutoAdcSetting.u32SC_BK12_0C);
1744 SC_W4BYTE(REG_SC_BK12_10_L, _stAutoAdcSetting.u32SC_BK12_10);
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_dip.c391 … SC_W4BYTE(0, REG_SC_BK34_2C_L, (pDBreg->u32H_PreScalingRatio & (~(BIT(31))))); // H pre-scaling in Hal_SC_DWIN_sw_db()
392 SC_W4BYTE(0, REG_SC_BK34_08_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
408 … SC_W4BYTE(0, REG_SC_BK3B_37_L, (pDBreg->u32H_PreScalingRatio & (~(BIT(31))))); // H pre-scaling in Hal_SC_DWIN_sw_db()
409 SC_W4BYTE(0, REG_SC_BK3B_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
425 … SC_W4BYTE(0, REG_SC_BK3C_37_L, (pDBreg->u32H_PreScalingRatio & (~(BIT(31))))); // H pre-scaling in Hal_SC_DWIN_sw_db()
426 SC_W4BYTE(0, REG_SC_BK3C_1B_L, pDBreg->u32V_PreScalingRatio); // V pre-scaling in Hal_SC_DWIN_sw_db()
1595 SC_W4BYTE(0, REG_SC_BK36_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1697 SC_W4BYTE(0, REG_SC_BK3B_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1799 SC_W4BYTE(0, REG_SC_BK3C_50_L,u64OffSet); in HAL_XC_DIP_SetWinProperty()
1854 SC_W4BYTE(0, REG_SC_BK36_60_L,u64OffSet); in HAL_XC_DIP_SetWinProperty1()
[all …]
H A Dmhal_sc.c751 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
752 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_4A_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
757 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_40_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
758 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_42_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
767 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_44_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_write_limit()
768 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_46_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_write_limit()
788 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_64_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_frcm_write_limit()
789 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_66_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_frcm_write_limit()
794 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_68_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_frcm_write_limit()
795 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_6A_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_frcm_write_limit()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_adc.c1696 SC_W4BYTE(REG_SC_BK12_48_L, _stAutoAdcSetting.u32SC_BK12_08);
1697 SC_W4BYTE(REG_SC_BK12_4A_L, _stAutoAdcSetting.u32SC_BK12_0A);
1698 SC_W4BYTE(REG_SC_BK12_4C_L, _stAutoAdcSetting.u32SC_BK12_0C);
1699 SC_W4BYTE(REG_SC_BK12_50_L, _stAutoAdcSetting.u32SC_BK12_10);
1700 SC_W4BYTE(REG_SC_BK12_52_L, _stAutoAdcSetting.u32SC_BK12_12);
1701 SC_W4BYTE(REG_SC_BK12_54_L, _stAutoAdcSetting.u32SC_BK12_14);
1741 SC_W4BYTE(REG_SC_BK12_08_L, _stAutoAdcSetting.u32SC_BK12_08);
1742 SC_W4BYTE(REG_SC_BK12_0A_L, _stAutoAdcSetting.u32SC_BK12_0A);
1743 SC_W4BYTE(REG_SC_BK12_0C_L, _stAutoAdcSetting.u32SC_BK12_0C);
1744 SC_W4BYTE(REG_SC_BK12_10_L, _stAutoAdcSetting.u32SC_BK12_10);
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_adc.c1696 SC_W4BYTE(REG_SC_BK12_48_L, _stAutoAdcSetting.u32SC_BK12_08);
1697 SC_W4BYTE(REG_SC_BK12_4A_L, _stAutoAdcSetting.u32SC_BK12_0A);
1698 SC_W4BYTE(REG_SC_BK12_4C_L, _stAutoAdcSetting.u32SC_BK12_0C);
1699 SC_W4BYTE(REG_SC_BK12_50_L, _stAutoAdcSetting.u32SC_BK12_10);
1700 SC_W4BYTE(REG_SC_BK12_52_L, _stAutoAdcSetting.u32SC_BK12_12);
1701 SC_W4BYTE(REG_SC_BK12_54_L, _stAutoAdcSetting.u32SC_BK12_14);
1741 SC_W4BYTE(REG_SC_BK12_08_L, _stAutoAdcSetting.u32SC_BK12_08);
1742 SC_W4BYTE(REG_SC_BK12_0A_L, _stAutoAdcSetting.u32SC_BK12_0A);
1743 SC_W4BYTE(REG_SC_BK12_0C_L, _stAutoAdcSetting.u32SC_BK12_0C);
1744 SC_W4BYTE(REG_SC_BK12_10_L, _stAutoAdcSetting.u32SC_BK12_10);
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_sc.c767 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
768 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_4A_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
773 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_40_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
774 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_42_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
783 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_44_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_write_limit()
784 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_46_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_write_limit()
804 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_64_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_frcm_write_limit()
805 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_66_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_frcm_write_limit()
810 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_68_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_frcm_write_limit()
811 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_6A_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_frcm_write_limit()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_sc.c767 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
768 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_4A_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
773 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_40_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
774 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_42_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
783 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_44_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_write_limit()
784 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_46_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_write_limit()
804 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_64_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_frcm_write_limit()
805 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_66_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_frcm_write_limit()
810 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_68_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_frcm_write_limit()
811 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_6A_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_frcm_write_limit()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_sc.c767 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
768 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_4A_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
773 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_40_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
774 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_42_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
783 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_44_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_write_limit()
784 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_46_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_write_limit()
804 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_64_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_frcm_write_limit()
805 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_66_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_frcm_write_limit()
810 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_68_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_frcm_write_limit()
811 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_6A_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_frcm_write_limit()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_sc.c767 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_48_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
768 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_4A_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
773 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_40_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_write_limit()
774 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_42_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_write_limit()
783 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_44_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_write_limit()
784 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_46_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_write_limit()
804 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_64_L, u32MinLimitAddress); //F2 memory min address in Hal_SC_set_frcm_write_limit()
805 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_66_L, u32MaxLimitAddress); //F2 memory max address in Hal_SC_set_frcm_write_limit()
810 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_68_L, u32MinLimitAddress); //F1 memory min address in Hal_SC_set_frcm_write_limit()
811 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK0D_6A_L, u32MaxLimitAddress); //F1 memory max address in Hal_SC_set_frcm_write_limit()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_ld.c806 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK2E_38_L, 0x8000 & 0xFFFFF); in MDrv_LD_CommonInit()
807 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK2E_3A_L, 0x8000 & 0xFFFFF); in MDrv_LD_CommonInit()
1057 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK2E_19_L, u32Ratio&0x0FFFFF); in MDrv_XC_LD_SetPanelType()
1059 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK2E_1B_L, u32Ratio&0x0FFFFF); in MDrv_XC_LD_SetPanelType()
1062 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK2E_30_L, u32Ratio&0x0FFFFF); in MDrv_XC_LD_SetPanelType()
1064 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK2E_32_L, u32Ratio&0x0FFFFF); in MDrv_XC_LD_SetPanelType()
1544 SC_W4BYTE(psXCInstPri->u32DeviceID, u32RegAddr, (u32LDFBase/LD_MIU_ALIGN)& MEMORY_MASK); in MDrv_LD_Set_LDF_FrameBufBaseAddr()
1561 SC_W4BYTE(psXCInstPri->u32DeviceID, u32RegAddr, (u32LDBBase/LD_MIU_ALIGN)); in MDrv_LD_Set_LDB_FrameBufBaseAddr()
1577 SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK2E_7E_L,(u32LEDOffset/LD_MIU_ALIGN) & MEMORY_MASK); in MDrv_LD_Set_LEDData_BaseOffset()
1594 … SC_W4BYTE(psXCInstPri->u32DeviceID, REG_SC_BK2E_79_L, (u32EDGE2DBase/LD_MIU_ALIGN) & MEMORY_MASK); in MDrv_LD_Set_EDGE2D_BaseAddr()

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