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Searched refs:SC_DBG (Results 1 – 25 of 46) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/sc/drv/sc/sc1/
H A DdrvSC.c202 #define SC_DBG(_d, _f, _a...) { if (_dbgmsg >= _d) printf(_f, ##_a); } macro
204 #define SC_DBG(_d, _f, _a...) { } macro
593SC_DBG(E_SC_DBGLV_ERR_ONLY, "[%s][%d] ioctl: MDRV_SC_EXIT failed\n", __FUNCTION__, __LINE__); in _SC_ResetFIFO()
645 SC_DBG(E_SC_DBGLV_ERR_ONLY, "[%s][%d] read error\n", __FUNCTION__, __LINE__); in _SC_Read()
663 SC_DBG(E_SC_DBGLV_INFO, " card out 2\n"); in _SC_Read()
757 SC_DBG(E_SC_DBGLV_ERR_ONLY, "[%s][%d] read error\n", __FUNCTION__, __LINE__); in _SC_Write()
780 SC_DBG(E_SC_DBGLV_INFO, " card out 2\n"); in _SC_Write()
845 SC_DBG(E_SC_DBGLV_INFO, " card out 1\n"); in _SC_Reset()
853 SC_DBG(E_SC_DBGLV_INFO, " card out 2\n"); in _SC_Reset()
953 SC_DBG(E_SC_DBGLV_INFO, "Get SC command: 0x%02x.\n", MB_Command.u8Index); in _MDrv_SC_MailBoxHandler()
[all …]
/utopia/UTPA2-700.0.x/modules/sc/drv/sc/sc2/
H A DdrvSC.c179 #define SC_DBG(_d, _f, _a...) { if (_dbgmsg >= _d) ULOGD(TAG_SC, _f, ##_a); } macro
181 #define SC_DBG(_d, _f, _a...) { } macro
443SC_DBG(E_SC_DBGLV_ERR_ONLY, "[%s][%d] ioctl: MDRV_SC_EXIT failed\n", __FUNCTION__, __LINE__); in _SC_ResetFIFO()
495 SC_DBG(E_SC_DBGLV_ERR_ONLY, "[%s][%d] read error\n", __FUNCTION__, __LINE__); in _SC_Read()
503 SC_DBG(E_SC_DBGLV_INFO, "%s\n", __FUNCTION__); in _SC_Read()
515 SC_DBG(E_SC_DBGLV_INFO, " card out 2\n"); in _SC_Read()
604 SC_DBG(E_SC_DBGLV_ERR_ONLY, "[%s][%d] read error\n", __FUNCTION__, __LINE__); in _SC_Write()
625 SC_DBG(E_SC_DBGLV_INFO, " card out 2\n"); in _SC_Write()
668 SC_DBG(E_SC_DBGLV_INFO, " card out 1\n"); in _SC_Reset()
676 SC_DBG(E_SC_DBGLV_INFO, " card out 2\n"); in _SC_Reset()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_sc.c185 #define SC_DBG(x) x macro
188 #define SC_DBG(x) //x macro
967 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_wr_bank_mapping()
997 SC_DBG(printf("Get WR bank mapping SC_BK12_07/47_L[15:14]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_Get_WR_Bank_Mapping()
1626SC_DBG(printf("[%s][%d] SUB_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __FU… in _Hal_SC_fill_sub_sw_db_burst()
1631SC_DBG(printf("[%s][%d] MAIN_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __F… in _Hal_SC_fill_sub_sw_db_burst()
1962SC_DBG(printf("[%s][%d] SUB_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __FU… in Hal_SC_sw_db()
1967SC_DBG(printf("[%s][%d] MAIN_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __F… in Hal_SC_sw_db()
2153 SC_DBG(printf("Error! SWDS_DB flow but DS not enable!!\n")); in Hal_SC_SWDS_AddCmd()
2188 SC_DBG(printf("bEnable setting error!\n")); in Hal_SC_set_output_capture_enable()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_sc.c185 #define SC_DBG(x) x macro
188 #define SC_DBG(x) //x macro
840 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_wr_bank_mapping()
870 SC_DBG(printf("Get WR bank mapping SC_BK12_07/47_L[15:14]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_Get_WR_Bank_Mapping()
1449SC_DBG(printf("[%s][%d] SUB_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __FU… in _Hal_SC_fill_sub_sw_db_burst()
1454SC_DBG(printf("[%s][%d] MAIN_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __F… in _Hal_SC_fill_sub_sw_db_burst()
1771SC_DBG(printf("[%s][%d] SUB_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __FU… in Hal_SC_sw_db()
1776SC_DBG(printf("[%s][%d] MAIN_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __F… in Hal_SC_sw_db()
1965 SC_DBG(printf("Error! SWDS_DB flow but DS not enable!!\n")); in Hal_SC_SWDS_AddCmd()
2000 SC_DBG(printf("bEnable setting error!\n")); in Hal_SC_set_output_capture_enable()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_sc.c185 #define SC_DBG(x) x macro
188 #define SC_DBG(x) //x macro
774 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_wr_bank_mapping()
804 SC_DBG(printf("Get WR bank mapping SC_BK12_07/47_L[15:14]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_Get_WR_Bank_Mapping()
1362SC_DBG(printf("[%s][%d] SUB_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __FU… in _Hal_SC_fill_sub_sw_db_burst()
1367SC_DBG(printf("[%s][%d] MAIN_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __F… in _Hal_SC_fill_sub_sw_db_burst()
1684SC_DBG(printf("[%s][%d] SUB_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __FU… in Hal_SC_sw_db()
1689SC_DBG(printf("[%s][%d] MAIN_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __F… in Hal_SC_sw_db()
1878 SC_DBG(printf("Error! SWDS_DB flow but DS not enable!!\n")); in Hal_SC_SWDS_AddCmd()
1913 SC_DBG(printf("bEnable setting error!\n")); in Hal_SC_set_output_capture_enable()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_sc.c185 #define SC_DBG(x) x macro
188 #define SC_DBG(x) //x macro
836 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_wr_bank_mapping()
866 SC_DBG(printf("Get WR bank mapping SC_BK12_07/47_L[15:14]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_Get_WR_Bank_Mapping()
1409SC_DBG(printf("[%s][%d] SUB_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __FU… in _Hal_SC_fill_sub_sw_db_burst()
1414SC_DBG(printf("[%s][%d] MAIN_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __F… in _Hal_SC_fill_sub_sw_db_burst()
1767SC_DBG(printf("[%s][%d] SUB_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __FU… in Hal_SC_sw_db()
1772SC_DBG(printf("[%s][%d] MAIN_WINDOW u32V_PostScalingRatio is %du for compute Extra Request\n", __F… in Hal_SC_sw_db()
1952 SC_DBG(printf("Error! SWDS_DB flow but DS not enable!!\n")); in Hal_SC_SWDS_AddCmd()
1987 SC_DBG(printf("bEnable setting error!\n")); in Hal_SC_set_output_capture_enable()
[all …]
/utopia/UTPA2-700.0.x/modules/sc/hal/M7621/sc/
H A DhalSC.c126 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
129 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/maserati/sc/
H A DhalSC.c126 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
129 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/M7821/sc/
H A DhalSC.c126 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
129 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/maxim/sc/
H A DhalSC.c126 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
129 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/manhattan/sc/
H A DhalSC.c126 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
129 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/maldives/sc/
H A DhalSC.c126 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
129 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/mainz/sc/
H A DhalSC.c129 #define SC_DBG(fmt, args...) ULOGD(TAG_SC, "[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
132 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/mustang/sc/
H A DhalSC.c126 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
129 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/messi/sc/
H A DhalSC.c129 #define SC_DBG(fmt, args...) ULOGD(TAG_SC, "[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
132 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/macan/sc/
H A DhalSC.c126 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
129 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/kano/sc/
H A DhalSC.c127 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
130 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/curry/sc/
H A DhalSC.c127 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
130 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/k6lite/sc/
H A DhalSC.c132 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
135 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/sc/hal/k6/sc/
H A DhalSC.c132 #define SC_DBG(fmt, args...) printf("[DEV][SMART][%06d] " fmt, __LINE__, ##args) macro
135 #define SC_DBG(fmt, args...) {} macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c170 #define SC_DBG(x) x macro
173 #define SC_DBG(x) macro
494 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_wr_bank_mapping()
510 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_frcm_wr_bank_mapping()
541 SC_DBG(printf("Get WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_Get_WR_Bank_Mapping()
761 SC_DBG(printf("Sub=%d, MainHs=%d, SubHs=%d, MainHe=%d, SubHe=%d :: Extra=%d\n", in Hal_SC_is_extra_req_en()
3374SC_DBG(printf("(100000+u16VFreq/2)/u16VFreq)=%u, u16VFreq=%u\n",((100000+u16VFreq/2)/u16VFreq), u1… in _Hal_SC_GetInputVPeriod()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_sc.c147 #define SC_DBG(x) //x macro
463 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_wr_bank_mapping()
492 SC_DBG(printf("Get WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_Get_WR_Bank_Mapping()
618 SC_DBG(printf("Sub=%d, MainHs=%d, SubHs=%d, MainHe=%d, SubHe=%d :: Extra=%d\n", in Hal_SC_is_extra_req_en()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_sc.c148 #define SC_DBG(x) //x macro
467 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_wr_bank_mapping()
496 SC_DBG(printf("Get WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_Get_WR_Bank_Mapping()
622 SC_DBG(printf("Sub=%d, MainHs=%d, SubHs=%d, MainHe=%d, SubHe=%d :: Extra=%d\n", in Hal_SC_is_extra_req_en()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c174 #define SC_DBG(x) x macro
177 #define SC_DBG(x) macro
573 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_wr_bank_mapping()
589 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_frcm_wr_bank_mapping()
620 SC_DBG(printf("Get WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_Get_WR_Bank_Mapping()
843 SC_DBG(printf("Sub=%d, MainHs=%d, SubHs=%d, MainHe=%d, SubHe=%d :: Extra=%d\n", in Hal_SC_is_extra_req_en()
3500SC_DBG(printf("(100000+u16VFreq/2)/u16VFreq)=%u, u16VFreq=%u\n",((100000+u16VFreq/2)/u16VFreq), u1… in _Hal_SC_GetInputVPeriod()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c177 #define SC_DBG(x) x macro
180 #define SC_DBG(x) macro
583 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_wr_bank_mapping()
599 SC_DBG(printf("Set WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_set_frcm_wr_bank_mapping()
630 SC_DBG(printf("Get WR bank mapping SC_BK12_07/47_L[15:13]= 0x%x\n", ((MS_U16)u8val)<<13)); in Hal_SC_Get_WR_Bank_Mapping()
912 SC_DBG(printf("Sub=%d, MainHs=%d, SubHs=%d, MainHe=%d, SubHe=%d :: Extra=%d\n", in Hal_SC_is_extra_req_en()
4253SC_DBG(printf("(100000+u16VFreq/2)/u16VFreq)=%u, u16VFreq=%u\n",((100000+u16VFreq/2)/u16VFreq), u1… in _Hal_SC_GetInputVPeriod()

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