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Searched refs:SCM_REG_BASE (Results 1 – 15 of 15) sorted by relevance

/utopia/UTPA2-700.0.x/modules/vd/hal/mustang/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800 // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/hal/kano/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800UL // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/hal/maxim/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800UL // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/hal/macan/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800UL // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/hal/messi/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800UL // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/hal/manhattan/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800UL // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/hal/maserati/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800UL // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/hal/M7621/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800UL // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/hal/mainz/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800UL // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/hal/maldives/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800 // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/hal/M7821/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800UL // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/hal/mooney/avd/
H A DregAVD.h124 #define SCM_REG_BASE 0x3800UL // 0x3800 - 0x38FF macro
671 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
672 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
673 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
674 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
675 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
676 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
677 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
678 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
679 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/ve/drv/ve/include/
H A Dve_Analog_Reg.h1267 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
1268 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
1269 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
1270 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
1271 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
1272 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
1273 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
1274 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
1275 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
1276 #define BK_SECAM_0A (SCM_REG_BASE+0x0A)
[all …]
/utopia/UTPA2-700.0.x/modules/hdmi/drv/cec/include/
H A Dcec_Analog_Reg.h1354 #define BK_SECAM_01 (SCM_REG_BASE+0x01)
1355 #define BK_SECAM_02 (SCM_REG_BASE+0x02)
1356 #define BK_SECAM_03 (SCM_REG_BASE+0x03)
1357 #define BK_SECAM_04 (SCM_REG_BASE+0x04)
1358 #define BK_SECAM_05 (SCM_REG_BASE+0x05)
1359 #define BK_SECAM_06 (SCM_REG_BASE+0x06)
1360 #define BK_SECAM_07 (SCM_REG_BASE+0x07)
1361 #define BK_SECAM_08 (SCM_REG_BASE+0x08)
1362 #define BK_SECAM_09 (SCM_REG_BASE+0x09)
1363 #define BK_SECAM_0A (SCM_REG_BASE+0x0A)
[all …]
/utopia/UTPA2-700.0.x/modules/vd/drv/avd/
H A DAVD.c810 s_au16Bank_SECAM[i] = HAL_AVD_GetReg(SCM_REG_BASE+i); in vd_str_store_reg()
916 HAL_AVD_SetReg(SCM_REG_BASE+i, s_au16Bank_SECAM[i]); in vd_str_load_reg()
1876 ((u16Addr & 0xFF00 ) == SCM_REG_BASE)) in Drv_AVD_SetRegValue()