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Searched refs:REG_SC_BK20_03_L (Results 1 – 25 of 66) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_dip.c1356 SC_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
1395 SC_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
1430 SC_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
H A Dmhal_sc.c9687 if (SC_R2BYTEMSK(0, REG_SC_BK20_03_L, BIT(2)) == BIT(2)) in Hal_SC_3D_Set_DualView()
9689 SC_W2BYTEMSK(0, REG_SC_BK20_03_L,0, BIT(2));//reg_force_fe2_en in Hal_SC_3D_Set_DualView()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_3d.c15904 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_03_L, BIT(2), BIT(2)); in MDrv_XC_3D_CfgSubWin()
15945 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_03_L, 0, BIT(2)); in MDrv_XC_3D_CfgSubWin()
16131 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_03_L,0x00, BIT(2));//reg_force_fe2_en in MDrv_XC_3D_LoadReg()
16446 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_03_L,BIT(2), BIT(2));//reg_force_fe2_en in MDrv_XC_3D_LoadReg()
16549 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_03_L,BIT(2), BIT(2));//reg_force_fe2_en in MDrv_XC_3D_LoadReg()
16590 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_03_L,BIT(2), BIT(2));//reg_force_fe2_en in MDrv_XC_3D_LoadReg()
16615 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_03_L,BIT(2), BIT(2));//reg_force_fe2_en in MDrv_XC_3D_LoadReg()
16644 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_03_L,BIT(2), BIT(2));//reg_force_fe2_en in MDrv_XC_3D_LoadReg()
16734 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_03_L,BIT(2), BIT(2));//reg_force_fe2_en in MDrv_XC_3D_LoadReg()
16769 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_03_L,BIT(2), BIT(2));//reg_force_fe2_en in MDrv_XC_3D_LoadReg()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_dip.c1980 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
2019 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
2054 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
H A Dmhal_sc.c11255 if (SC_R2BYTEMSK(0, REG_SC_BK20_03_L, BIT(2)) == BIT(2)) in Hal_SC_3D_Set_DualView()
11257 SC_W2BYTEMSK(0, REG_SC_BK20_03_L,0, BIT(2));//reg_force_fe2_en in Hal_SC_3D_Set_DualView()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_dip.c1946 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
1985 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
2020 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
H A Dmhal_sc.c10800 if (SC_R2BYTEMSK(0, REG_SC_BK20_03_L, BIT(2)) == BIT(2)) in Hal_SC_3D_Set_DualView()
10802 SC_W2BYTEMSK(0, REG_SC_BK20_03_L,0, BIT(2));//reg_force_fe2_en in Hal_SC_3D_Set_DualView()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_dip.c1981 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
2020 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
2055 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
H A Dmhal_sc.c11244 if (SC_R2BYTEMSK(0, REG_SC_BK20_03_L, BIT(2)) == BIT(2)) in Hal_SC_3D_Set_DualView()
11246 SC_W2BYTEMSK(0, REG_SC_BK20_03_L,0, BIT(2));//reg_force_fe2_en in Hal_SC_3D_Set_DualView()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_dip.c1946 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
1985 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
2020 DIP_W2BYTEMSK(0, REG_SC_BK20_03_L, BIT(1),BIT(1)); in HAL_XC_DIP_MuxDispatch()
H A Dmhal_sc.c10778 if (SC_R2BYTEMSK(0, REG_SC_BK20_03_L, BIT(2)) == BIT(2)) in Hal_SC_3D_Set_DualView()
10780 SC_W2BYTEMSK(0, REG_SC_BK20_03_L,0, BIT(2));//reg_force_fe2_en in Hal_SC_3D_Set_DualView()
/utopia/UTPA2-700.0.x/modules/ve/hal/mainz/ve/
H A Dmhal_tvencoder.c927 MDrv_Write2ByteMask(REG_SC_BK20_03_L, 0x0002, 0x0002); // set source from main in Hal_VE_set_mux()
/utopia/UTPA2-700.0.x/modules/ve/hal/messi/ve/
H A Dmhal_tvencoder.c927 MDrv_Write2ByteMask(REG_SC_BK20_03_L, 0x0002, 0x0002); // set source from main in Hal_VE_set_mux()
/utopia/UTPA2-700.0.x/modules/ve/drv/ve/include/
H A Dve_Analog_Reg.h158 #define REG_SC_BK20_03_L (REG_SC_BASE + 0x2000 + 0x06) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h6110 #define REG_SC_BK20_03_L _PK_L_(0x20, 0x03) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h6110 #define REG_SC_BK20_03_L _PK_L_(0x20, 0x03) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h6112 #define REG_SC_BK20_03_L _PK_L_(0x20, 0x03) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h6121 #define REG_SC_BK20_03_L _PK_L_(0x20, 0x03) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h6112 #define REG_SC_BK20_03_L _PK_L_(0x20, 0x03) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h6110 #define REG_SC_BK20_03_L _PK_L_(0x20, 0x03) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h6112 #define REG_SC_BK20_03_L _PK_L_(0x20, 0x03) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h6110 #define REG_SC_BK20_03_L _PK_L_(0x20, 0x03) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h6112 #define REG_SC_BK20_03_L _PK_L_(0x20, 0x03) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h6110 #define REG_SC_BK20_03_L _PK_L_(0x20, 0x03) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h6112 #define REG_SC_BK20_03_L _PK_L_(0x20, 0x03) macro

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