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Searched refs:REG_SC_BK20_02_L (Results 1 – 25 of 62) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c5601 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(2):0, BIT(2)); in Hal_SC_set_frcm_to_FD_mask()
5605 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(10):0, BIT(10)); in Hal_SC_set_frcm_to_FD_mask()
5813 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(0):0, BIT(0)); in Hal_SC_set_frcm_to_freeze()
5817 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(8):0, BIT(8)); in Hal_SC_set_frcm_to_freeze()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c5738 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(2):0, BIT(2)); in Hal_SC_set_frcm_to_FD_mask()
5742 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(10):0, BIT(10)); in Hal_SC_set_frcm_to_FD_mask()
5950 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(0):0, BIT(0)); in Hal_SC_set_frcm_to_freeze()
5954 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(8):0, BIT(8)); in Hal_SC_set_frcm_to_freeze()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c6841 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(2):0, BIT(2)); in Hal_SC_set_frcm_to_FD_mask()
6845 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(10):0, BIT(10)); in Hal_SC_set_frcm_to_FD_mask()
7053 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(0):0, BIT(0)); in Hal_SC_set_frcm_to_freeze()
7057 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(8):0, BIT(8)); in Hal_SC_set_frcm_to_freeze()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c7445 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(2):0, BIT(2)); in Hal_SC_set_frcm_to_FD_mask()
7449 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(10):0, BIT(10)); in Hal_SC_set_frcm_to_FD_mask()
7657 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(0):0, BIT(0)); in Hal_SC_set_frcm_to_freeze()
7661 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(8):0, BIT(8)); in Hal_SC_set_frcm_to_freeze()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_sc.c7649 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(2):0, BIT(2)); in Hal_SC_set_frcm_to_FD_mask()
7653 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(10):0, BIT(10)); in Hal_SC_set_frcm_to_FD_mask()
7861 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(0):0, BIT(0)); in Hal_SC_set_frcm_to_freeze()
7865 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(8):0, BIT(8)); in Hal_SC_set_frcm_to_freeze()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_sc.c8364 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(2):0, BIT(2)); in Hal_SC_set_frcm_to_FD_mask()
8368 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(10):0, BIT(10)); in Hal_SC_set_frcm_to_FD_mask()
8558 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(0):0, BIT(0)); in Hal_SC_set_frcm_to_freeze()
8562 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(8):0, BIT(8)); in Hal_SC_set_frcm_to_freeze()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_sc.c8387 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(2):0, BIT(2)); in Hal_SC_set_frcm_to_FD_mask()
8391 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(10):0, BIT(10)); in Hal_SC_set_frcm_to_FD_mask()
8581 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(0):0, BIT(0)); in Hal_SC_set_frcm_to_freeze()
8585 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(8):0, BIT(8)); in Hal_SC_set_frcm_to_freeze()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_sc.c8645 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(2):0, BIT(2)); in Hal_SC_set_frcm_to_FD_mask()
8649 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(10):0, BIT(10)); in Hal_SC_set_frcm_to_FD_mask()
8839 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(0):0, BIT(0)); in Hal_SC_set_frcm_to_freeze()
8843 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(8):0, BIT(8)); in Hal_SC_set_frcm_to_freeze()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_sc.c8646 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(2):0, BIT(2)); in Hal_SC_set_frcm_to_FD_mask()
8650 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(10):0, BIT(10)); in Hal_SC_set_frcm_to_FD_mask()
8840 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(0):0, BIT(0)); in Hal_SC_set_frcm_to_freeze()
8844 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L, (bEnable==TRUE)?BIT(8):0, BIT(8)); in Hal_SC_set_frcm_to_freeze()
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_3d.c17037 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L,BIT(3), BIT(3));//reg_op1_frcm_cnnet_sptha… in MDrv_XC_3D_LoadReg()
17146 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L,BIT(3), BIT(3));//reg_op1_frcm_cnnet_sptha… in MDrv_XC_3D_LoadReg()
17422 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L,BIT(3), BIT(3));//reg_force_fe2_en in MDrv_XC_3D_LoadReg()
17565 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK20_02_L,BIT(3), BIT(3));//reg_force_fe2_en in MDrv_XC_3D_LoadReg()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h6108 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h6108 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h6110 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h6119 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h6110 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h6108 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h6110 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h6108 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h6110 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h6108 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h6110 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/messi/wble/include/
H A Dhwreg_wble.h6108 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7821/wble/include/
H A Dhwreg_wble.h6108 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/ace/include/
H A Dhwreg_ace.h6108 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/maxim/wble/include/
H A Dhwreg_wble.h6108 #define REG_SC_BK20_02_L _PK_L_(0x20, 0x02) macro

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