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Searched refs:REG_SC_BK12_33_L (Results 1 – 25 of 64) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_3d.c10940 u16OPM = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L); in MDrv_XC_Set_3D_LR_Frame_Exchg_burst()
10947 … MDrv_XC_MLoad_WriteCmd(pInstance, REG_SC_BK12_33_L, u16OPM, BIT(8));//F2 OPM 3D LR invert in MDrv_XC_Set_3D_LR_Frame_Exchg_burst()
11203 u16OPM = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L); in MDrv_XC_Set_3D_LR_Frame_Exchg()
11208 … SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, u16OPM, BIT(8));//F2 OPM 3D LR invert in MDrv_XC_Set_3D_LR_Frame_Exchg()
11373 u16OPM = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L); in MDrv_XC_3D_Is_LR_Frame_Exchged()
11376 bRet = (SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(8)) == BIT(8)); in MDrv_XC_3D_Is_LR_Frame_Exchged()
16092 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0x0000, 0x0082);//HDMI 3D field select to… in MDrv_XC_3D_LoadReg()
16121 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(11)|BIT(8)|BIT(1)|BIT(0));//[11]op… in MDrv_XC_3D_LoadReg()
16466 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0x0800, 0x0800);//opm3d: OPM SBS using PIP in MDrv_XC_3D_LoadReg()
16535 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(7), BIT(7));//OP 3D ENABLE in MDrv_XC_3D_LoadReg()
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_sc.c2918 SC_W2BYTEMSK(0, REG_SC_BK12_33_L, BIT(15), BIT(15));///2Dto3D LR flag enable in Hal_XC_H3D_LR_Toggle_Enable()
2924 SC_W2BYTEMSK(0, REG_SC_BK12_33_L, (bEn<<1), (BIT(1)));//L first, in Hal_XC_H3D_LR_Toggle_Enable()
2930 SC_W2BYTEMSK(0, REG_SC_BK12_33_L, 0, (BIT(1)));//L first, in Hal_XC_H3D_LR_Toggle_Enable()
2933 SC_W2BYTEMSK(0, REG_SC_BK12_33_L, 0, BIT(15)); in Hal_XC_H3D_LR_Toggle_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c5145 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(2), BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5150 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5164 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, (bEn<<1), (BIT(1)));//L first, in Hal_XC_H3D_LR_Toggle_Enable()
5177 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(15), BIT(15));///2Dto3D LR flag enable in Hal_XC_H3D_LR_Toggle_Enable()
5188 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, (BIT(1))); in Hal_XC_H3D_LR_Toggle_Enable()
5189 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(15)); in Hal_XC_H3D_LR_Toggle_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_sc.c5023 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(2), BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5028 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5042 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, (bEn<<1), (BIT(1)));//L first, in Hal_XC_H3D_LR_Toggle_Enable()
5055 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(15), BIT(15));///2Dto3D LR flag enable in Hal_XC_H3D_LR_Toggle_Enable()
5066 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, (BIT(1))); in Hal_XC_H3D_LR_Toggle_Enable()
5067 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(15)); in Hal_XC_H3D_LR_Toggle_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_sc.c5405 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(2), BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5410 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5424 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, (bEn<<1), (BIT(1)));//L first, in Hal_XC_H3D_LR_Toggle_Enable()
5437 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(15), BIT(15));///2Dto3D LR flag enable in Hal_XC_H3D_LR_Toggle_Enable()
5448 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, (BIT(1))); in Hal_XC_H3D_LR_Toggle_Enable()
5449 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(15)); in Hal_XC_H3D_LR_Toggle_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_sc.c5425 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(2), BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5430 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5444 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, (bEn<<1), (BIT(1)));//L first, in Hal_XC_H3D_LR_Toggle_Enable()
5457 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(15), BIT(15));///2Dto3D LR flag enable in Hal_XC_H3D_LR_Toggle_Enable()
5468 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, (BIT(1))); in Hal_XC_H3D_LR_Toggle_Enable()
5469 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(15)); in Hal_XC_H3D_LR_Toggle_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_sc.c5710 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(2), BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5715 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5729 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, (bEn<<1), (BIT(1)));//L first, in Hal_XC_H3D_LR_Toggle_Enable()
5742 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(15), BIT(15));///2Dto3D LR flag enable in Hal_XC_H3D_LR_Toggle_Enable()
5753 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, (BIT(1))); in Hal_XC_H3D_LR_Toggle_Enable()
5754 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(15)); in Hal_XC_H3D_LR_Toggle_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_sc.c5710 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(2), BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5715 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
5729 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, (bEn<<1), (BIT(1)));//L first, in Hal_XC_H3D_LR_Toggle_Enable()
5742 …SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(15), BIT(15));///2Dto3D LR flag enable in Hal_XC_H3D_LR_Toggle_Enable()
5753 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, (BIT(1))); in Hal_XC_H3D_LR_Toggle_Enable()
5754 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(15)); in Hal_XC_H3D_LR_Toggle_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_sc.c2926 SC_W2BYTEMSK(0,REG_SC_BK12_33_L, (bEn<<15), (BIT(15))); //enable op active 2d to 3d in Hal_XC_H3D_LR_Toggle_Enable()
2931 SC_W2BYTEMSK(0,REG_SC_BK12_33_L, (bEn<<1), (BIT(1))); in Hal_XC_H3D_LR_Toggle_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c4572 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, BIT(2), BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
4577 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, 0, BIT(2)); in Hal_XC_H3D_LR_Toggle_Enable()
4586 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, (bEn<<1), (BIT(1))); in Hal_XC_H3D_LR_Toggle_Enable()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c3666 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, (bEn<<1), (BIT(1))); in Hal_XC_H3D_LR_Toggle_Enable()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h4122 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h4122 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h4124 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h4124 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h4124 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c3792 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK12_33_L, (bEn<<1), (BIT(1))); in Hal_XC_H3D_LR_Toggle_Enable()
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h4122 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h4124 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h4122 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h4124 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h4122 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/messi/dlc/include/
H A Dhwreg_dlc.h4124 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/messi/wble/include/
H A Dhwreg_wble.h4122 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/M7821/wble/include/
H A Dhwreg_wble.h4122 #define REG_SC_BK12_33_L _PK_L_(0x12, 0x33) macro

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