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Searched refs:REG_SC_BK04_40_L (Results 1 – 25 of 68) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_sc.c510 SC_W2BYTEMSK(0,REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
528 bYUVInput = ( SC_R2BYTEMSK(0,REG_SC_BK04_40_L, BIT(3) ) || in Hal_SC_get_csc()
3604 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(0, REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(0, REG_SC_BK18_… in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_sc.c514 SC_W2BYTEMSK(0,REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
532 bYUVInput = ( SC_R2BYTEMSK(0,REG_SC_BK04_40_L, BIT(3) ) || in Hal_SC_get_csc()
3644 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(0, REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(0, REG_SC_BK18_… in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_sc.c561 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
579 … bYUVInput = ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, BIT(3) ))? FALSE:TRUE; in Hal_SC_get_ip2_csc()
4993 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_76_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_sc.c640 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
658 … bYUVInput = ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, BIT(3) ))? FALSE:TRUE; in Hal_SC_get_ip2_csc()
5129 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_76_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/include/
H A DMooney_Main.c61869 { PQ_MAP_REG(REG_SC_BK04_40_L), 0x08, 0x00/*OFF*/, },
61870 { PQ_MAP_REG(REG_SC_BK04_40_L), 0x03, 0x00/*OFF*/, },
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_sc.c891 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
6125 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_6E_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_sc.c825 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
5963 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_6E_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_sc.c887 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
5852 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_6E_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_sc.c1018 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
6454 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_6E_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_sc.c650 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
6200 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_76_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_sc.c641 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
6915 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_76_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_sc.c651 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
6957 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_76_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_sc.c664 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
7443 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_76_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_sc.c664 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
7463 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_76_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_sc.c664 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
7709 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_76_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_sc.c664 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK04_40_L, (bEnable ? BIT(3):0), BIT(3)); in Hal_SC_set_csc()
7709 …bIsR2YEnable = (MS_BOOL)(SC_R2BYTEMSK(REG_SC_BK04_40_L, BIT(3)) || SC_R2BYTEMSK(REG_SC_BK18_76_L, … in MHal_XC_IsPNLYUVOutput()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h1281 #define REG_SC_BK04_40_L _PK_L_(0x04, 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h1281 #define REG_SC_BK04_40_L _PK_L_(0x04, 0x40) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h1283 #define REG_SC_BK04_40_L _PK_L_(0x04, 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h1281 #define REG_SC_BK04_40_L _PK_L_(0x04, 0x40) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h1283 #define REG_SC_BK04_40_L _PK_L_(0x04, 0x40) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h1281 #define REG_SC_BK04_40_L _PK_L_(0x04, 0x40) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h1283 #define REG_SC_BK04_40_L _PK_L_(0x04, 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h1281 #define REG_SC_BK04_40_L _PK_L_(0x04, 0x40) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h1283 #define REG_SC_BK04_40_L _PK_L_(0x04, 0x40) macro

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