| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_ip.c | 306 SC_W2BYTEMSK(0,REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12)); in Hal_SC_ip_set_reg_usr_vspolmd() 335 SC_W2BYTEMSK(0,REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1518 SC_W2BYTEMSK(0,REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1519 SC_W2BYTEMSK(0,REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 1784 SC_W2BYTE(0,REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_ip.c | 306 SC_W2BYTEMSK(0,REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12)); in Hal_SC_ip_set_reg_usr_vspolmd() 335 SC_W2BYTEMSK(0,REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1518 SC_W2BYTEMSK(0,REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1519 SC_W2BYTEMSK(0,REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 1784 SC_W2BYTE(0,REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_ip.c | 347 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(4) : 0, BIT(4)); in Hal_SC_ip_set_reg_usr_vspolmd() 361 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1713 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1714 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2084 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_ip.c | 361 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12)); in Hal_SC_ip_set_reg_usr_vspolmd() 392 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1779 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1780 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2215 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_ip.c | 408 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12)); in Hal_SC_ip_set_reg_usr_vspolmd() 439 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1796 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1797 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2209 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_ip.c | 361 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12)); in Hal_SC_ip_set_reg_usr_vspolmd() 392 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1779 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1780 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2202 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_ip.c | 361 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12)); in Hal_SC_ip_set_reg_usr_vspolmd() 392 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1779 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1780 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2202 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_ip.c | 365 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12)); in Hal_SC_ip_set_reg_usr_vspolmd() 396 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1781 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1782 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2204 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_ip.c | 347 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(4) : 0, BIT(4)); in Hal_SC_ip_set_reg_usr_vspolmd() 361 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1712 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1713 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2083 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_ip.c | 347 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(4) : 0, BIT(4)); in Hal_SC_ip_set_reg_usr_vspolmd() 361 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1712 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1713 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2083 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_ip.c | 364 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12)); in Hal_SC_ip_set_reg_usr_vspolmd() 395 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1752 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1753 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2175 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_ip.c | 347 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(4) : 0, BIT(4)); in Hal_SC_ip_set_reg_usr_vspolmd() 361 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1712 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1713 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2083 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_ip.c | 365 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12)); in Hal_SC_ip_set_reg_usr_vspolmd() 396 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1781 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1782 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2204 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_ip.c | 364 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12)); in Hal_SC_ip_set_reg_usr_vspolmd() 395 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1752 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1753 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2175 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_ip.c | 361 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, u8Enable ? BIT(12) : 0, BIT(12)); in Hal_SC_ip_set_reg_usr_vspolmd() 392 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L,0x0000,0x01FF); in Hal_SC_ip_init_reg_in_timingchange() 1779 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bEnable?BIT(0):0),BIT(0)); in Hal_SC_ip_set_user_def_interlace_status() 1780 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, (bIsInterlace?BIT(1):0),BIT(1)); in Hal_SC_ip_set_user_def_interlace_status() 2215 SC_W2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK03_21_L, value); in HAL_SC_ip_3DMainSub_IPSync()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/ |
| H A D | mhal_pq.c | 885 u16method = (MApi_XC_R2BYTE(REG_SC_BK03_21_L) & 0xC000); in Hal_PQ_get_rw_method() 903 MApi_XC_W2BYTEMSK(REG_SC_BK03_21_L, u16method, 0xC000); in Hal_PQ_set_rw_method()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/ |
| H A D | mhal_pq.c | 887 u16method = (MApi_XC_R2BYTE(REG_SC_BK03_21_L) & 0xC000); in Hal_PQ_get_rw_method() 905 MApi_XC_W2BYTEMSK(REG_SC_BK03_21_L, u16method, 0xC000); in Hal_PQ_set_rw_method()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/ |
| H A D | mhal_pq.c | 885 u16method = (MApi_XC_R2BYTE(REG_SC_BK03_21_L) & 0xC000); in Hal_PQ_get_rw_method() 903 MApi_XC_W2BYTEMSK(REG_SC_BK03_21_L, u16method, 0xC000); in Hal_PQ_set_rw_method()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/ |
| H A D | mhal_pq.c | 885 u16method = (MApi_XC_R2BYTE(REG_SC_BK03_21_L) & 0xC000); in Hal_PQ_get_rw_method() 903 MApi_XC_W2BYTEMSK(REG_SC_BK03_21_L, u16method, 0xC000); in Hal_PQ_set_rw_method()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/mooney/pq/ |
| H A D | mhal_pq.c | 1102 u16method = (MApi_XC_R2BYTE(REG_SC_BK03_21_L) & 0xC000); in Hal_PQ_get_rw_method() 1204 MApi_XC_W2BYTEMSK(REG_SC_BK03_21_L, u16method, 0xC000); in Hal_PQ_set_rw_method()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/manhattan/pq/ |
| H A D | mhal_pq.c | 985 u16method = (MApi_XC_R2BYTE(REG_SC_BK03_21_L) & 0xC000); in Hal_PQ_get_rw_method() 1087 MApi_XC_W2BYTEMSK(REG_SC_BK03_21_L, u16method, 0xC000); in Hal_PQ_set_rw_method()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/M7821/pq/ |
| H A D | mhal_pq.c | 1420 u16method = (MApi_XC_R2BYTE(REG_SC_BK03_21_L) & 0xC000); in Hal_PQ_get_rw_method() 1515 MApi_XC_W2BYTEMSK(REG_SC_BK03_21_L, u16method, 0xC000); in Hal_PQ_set_rw_method()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/M7621/pq/ |
| H A D | mhal_pq.c | 1420 u16method = (MApi_XC_R2BYTE(REG_SC_BK03_21_L) & 0xC000); in Hal_PQ_get_rw_method() 1515 MApi_XC_W2BYTEMSK(REG_SC_BK03_21_L, u16method, 0xC000); in Hal_PQ_set_rw_method()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/maserati/pq/ |
| H A D | mhal_pq.c | 1420 u16method = (MApi_XC_R2BYTE(REG_SC_BK03_21_L) & 0xC000); in Hal_PQ_get_rw_method() 1515 MApi_XC_W2BYTEMSK(REG_SC_BK03_21_L, u16method, 0xC000); in Hal_PQ_set_rw_method()
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| /utopia/UTPA2-700.0.x/modules/pq/hal/maxim/pq/ |
| H A D | mhal_pq.c | 1420 u16method = (MApi_XC_R2BYTE(REG_SC_BK03_21_L) & 0xC000); in Hal_PQ_get_rw_method() 1515 MApi_XC_W2BYTEMSK(REG_SC_BK03_21_L, u16method, 0xC000); in Hal_PQ_set_rw_method()
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