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Searched refs:REG_SC_BK03_10_L (Results 1 – 25 of 73) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_ip.c1355 return ( SC_R2BYTEMSK(0,REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1366 SC_W2BYTEMSK(0, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1379 SC_W2BYTEMSK(0, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_ip.c1355 return ( SC_R2BYTEMSK(0,REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1366 SC_W2BYTEMSK(0, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1379 SC_W2BYTEMSK(0, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_ip.c1454 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1467 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1482 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_ip.c1588 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1601 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1616 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_ip.c1605 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1618 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1633 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_ip.c1588 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1601 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1616 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_ip.c1588 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1601 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1616 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_ip.c1590 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1603 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1618 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_ip.c1454 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1467 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1482 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_ip.c1454 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1467 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1482 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_ip.c1561 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1574 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1589 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_ip.c1454 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1467 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1482 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_ip.c1590 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1603 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1618 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_ip.c1561 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1574 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1589 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_ip.c1588 return ( SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(1) ) )? TRUE:FALSE; in Hal_SC_ip_is_auto_position_result_ready()
1601 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Enable?BIT(0):0) , BIT(0) ); in Hal_SC_ip_set_auto_position_function()
1616 … SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (u8Threshold & 0x0F) << 12 , 0xF000 ); in Hal_SC_ip_set_valid_data_threshold()
/utopia/UTPA2-700.0.x/modules/pq/hal/kano/pq/include/
H A DKano_Sub.c102 { PQ_MAP_REG(REG_SC_BK03_10_L), 0x01, 0x01 },
/utopia/UTPA2-700.0.x/modules/pq/hal/curry/pq/include/
H A DCurry_Sub.c102 { PQ_MAP_REG(REG_SC_BK03_10_L), 0x01, 0x01 },
H A DKano_Sub.c102 { PQ_MAP_REG(REG_SC_BK03_10_L), 0x01, 0x01 },
/utopia/UTPA2-700.0.x/modules/pq/hal/k6lite/pq/include/
H A Dk6lite_Sub.c102 { PQ_MAP_REG(REG_SC_BK03_10_L), 0x01, 0x01 },
/utopia/UTPA2-700.0.x/modules/pq/hal/k6/pq/include/
H A Dk6_Sub.c102 { PQ_MAP_REG(REG_SC_BK03_10_L), 0x01, 0x01 },
/utopia/UTPA2-700.0.x/modules/xc/drv/xc/
H A Dmdrv_sc_ip.c4536 return SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, BIT(8)) >> 8; in MDrv_XC_GetAutoPositionForcePixelMode()
4550 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK03_10_L, (bEnable ? BIT(8) : 0), BIT(8)); in MDrv_XC_SetAutoPositionForcePixelMode()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h924 #define REG_SC_BK03_10_L _PK_L_(0x03, 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h924 #define REG_SC_BK03_10_L _PK_L_(0x03, 0x10) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h926 #define REG_SC_BK03_10_L _PK_L_(0x03, 0x10) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h924 #define REG_SC_BK03_10_L _PK_L_(0x03, 0x10) macro

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