Home
last modified time | relevance | path

Searched refs:REG_SC_BK01_26_L (Results 1 – 25 of 67) sorted by relevance

123

/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_ip.c1005 SC_W2BYTEMSK(0, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1098 SC_W2BYTEMSK(0, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 ); in Hal_SC_ip_set_post_glitch_removal()
1112 bEnable = (MS_BOOL)(SC_R2BYTEMSK(0,REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1115 return (MS_U8)(SC_R2BYTEMSK(0,REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4); in Hal_SC_ip_get_post_glitch_removal()
1792 value = SC_R2BYTE(0,REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
1911 SC_W2BYTEMSK(0,REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_set_FD_Mask()
1921 if(SC_R2BYTEMSK(0,REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask()
2035 SC_W2BYTEMSK(0, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2050 if(SC_R2BYTEMSK(0, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_ip.c1005 SC_W2BYTEMSK(0, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1098 SC_W2BYTEMSK(0, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 ); in Hal_SC_ip_set_post_glitch_removal()
1112 bEnable = (MS_BOOL)(SC_R2BYTEMSK(0,REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1115 return (MS_U8)(SC_R2BYTEMSK(0,REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4); in Hal_SC_ip_get_post_glitch_removal()
1792 value = SC_R2BYTE(0,REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
1911 SC_W2BYTEMSK(0,REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_set_FD_Mask()
1921 if(SC_R2BYTEMSK(0,REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask()
2035 SC_W2BYTEMSK(0, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2050 if(SC_R2BYTEMSK(0, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/
H A Dmhal_ip.c983 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1087 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1103 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1106 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2092 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2273 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2291 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_ip.c1116 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1220 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1236 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1239 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2223 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2367 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2390 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/
H A Dmhal_ip.c1163 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1239 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1255 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1258 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2217 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2356 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2379 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/
H A Dmhal_ip.c1116 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1220 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1236 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1239 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2210 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2354 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2377 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/
H A Dmhal_ip.c1116 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1220 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1236 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1239 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2210 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2354 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2377 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_ip.c1120 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1224 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1240 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1243 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2212 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2356 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2379 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_ip.c983 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1087 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1103 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1106 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2091 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2246 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2264 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/
H A Dmhal_ip.c983 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1087 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1103 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1106 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2091 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2246 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2264 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/
H A Dmhal_ip.c1119 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1195 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1211 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1214 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2183 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2322 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2345 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_ip.c983 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1087 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1103 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1106 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2091 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2246 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2264 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/
H A Dmhal_ip.c1120 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1224 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1240 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1243 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2212 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2351 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2374 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/
H A Dmhal_ip.c1119 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1195 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1211 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1214 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2183 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2322 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2345 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_ip.c1116 SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bMode<<2), BIT(2) ); in Hal_SC_ip_set_input_sync_sample_mode()
1220 …SC_W2BYTEMSK( psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, ((bEnble<<7)|((u8Range&0x07)<<4)), 0xF0 … in Hal_SC_ip_set_post_glitch_removal()
1236 bEnable = (MS_BOOL)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(7)) >> 7); in Hal_SC_ip_get_post_glitch_removal()
1239 …return (MS_U8)(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(6)|BIT(5)|BIT(4)) >> 4… in Hal_SC_ip_get_post_glitch_removal()
2223 value = SC_R2BYTE(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L); in HAL_SC_ip_3DMainSub_IPSync()
2367 SC_W2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, (bEnable?BIT(8):0), BIT(8)); in HAL_SC_ip_Set_FD_Mask_ByWin()
2390 if(SC_R2BYTEMSK(psXCInstPri->u32DeviceID, REG_SC_BK01_26_L, BIT(8))) in HAL_SC_ip_Get_FD_Mask_ByWin()
/utopia/UTPA2-700.0.x/modules/wble/hal/manhattan/wble/include/
H A Dhwreg_wble.h446 #define REG_SC_BK01_26_L _PK_L_(0x01, 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/ace/include/
H A Dhwreg_ace.h446 #define REG_SC_BK01_26_L _PK_L_(0x01, 0x26) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/k6/dlc/include/
H A Dhwreg_dlc.h448 #define REG_SC_BK01_26_L _PK_L_(0x01, 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/ace/include/
H A Dhwreg_ace.h446 #define REG_SC_BK01_26_L _PK_L_(0x01, 0x26) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/manhattan/dlc/include/
H A Dhwreg_dlc.h448 #define REG_SC_BK01_26_L _PK_L_(0x01, 0x26) macro
/utopia/UTPA2-700.0.x/modules/wble/hal/macan/wble/include/
H A Dhwreg_wble.h446 #define REG_SC_BK01_26_L _PK_L_(0x01, 0x26) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/curry/dlc/include/
H A Dhwreg_dlc.h448 #define REG_SC_BK01_26_L _PK_L_(0x01, 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/ace/include/
H A Dhwreg_ace.h446 #define REG_SC_BK01_26_L _PK_L_(0x01, 0x26) macro
/utopia/UTPA2-700.0.x/modules/dlc/hal/M7821/dlc/include/
H A Dhwreg_dlc.h448 #define REG_SC_BK01_26_L _PK_L_(0x01, 0x26) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/ace/include/
H A Dhwreg_ace.h446 #define REG_SC_BK01_26_L _PK_L_(0x01, 0x26) macro

123