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Searched refs:REG_PM_GPIO_BASE (Results 1 – 20 of 20) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_pm_sleep.h467 #define REG_PM_GPIO_00_L (REG_PM_GPIO_BASE + 0x00)
468 #define REG_PM_GPIO_00_H (REG_PM_GPIO_BASE + 0x01)
469 #define REG_PM_GPIO_01_L (REG_PM_GPIO_BASE + 0x02)
470 #define REG_PM_GPIO_01_H (REG_PM_GPIO_BASE + 0x03)
471 #define REG_PM_GPIO_02_L (REG_PM_GPIO_BASE + 0x04)
472 #define REG_PM_GPIO_02_H (REG_PM_GPIO_BASE + 0x05)
473 #define REG_PM_GPIO_03_L (REG_PM_GPIO_BASE + 0x06)
474 #define REG_PM_GPIO_03_H (REG_PM_GPIO_BASE + 0x07)
475 #define REG_PM_GPIO_04_L (REG_PM_GPIO_BASE + 0x08)
476 #define REG_PM_GPIO_04_H (REG_PM_GPIO_BASE + 0x09)
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H A Dmhal_xc_chip_config.h536 #define REG_PM_GPIO_BASE 0x000F00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_pm_sleep.h465 #define REG_PM_GPIO_00_L (REG_PM_GPIO_BASE + 0x00)
466 #define REG_PM_GPIO_00_H (REG_PM_GPIO_BASE + 0x01)
467 #define REG_PM_GPIO_01_L (REG_PM_GPIO_BASE + 0x02)
468 #define REG_PM_GPIO_01_H (REG_PM_GPIO_BASE + 0x03)
469 #define REG_PM_GPIO_02_L (REG_PM_GPIO_BASE + 0x04)
470 #define REG_PM_GPIO_02_H (REG_PM_GPIO_BASE + 0x05)
471 #define REG_PM_GPIO_03_L (REG_PM_GPIO_BASE + 0x06)
472 #define REG_PM_GPIO_03_H (REG_PM_GPIO_BASE + 0x07)
473 #define REG_PM_GPIO_04_L (REG_PM_GPIO_BASE + 0x08)
474 #define REG_PM_GPIO_04_H (REG_PM_GPIO_BASE + 0x09)
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H A Dmhal_xc_chip_config.h500 #define REG_PM_GPIO_BASE 0x000F00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_pm_sleep.h466 #define REG_PM_GPIO_00_L (REG_PM_GPIO_BASE + 0x00)
467 #define REG_PM_GPIO_00_H (REG_PM_GPIO_BASE + 0x01)
468 #define REG_PM_GPIO_01_L (REG_PM_GPIO_BASE + 0x02)
469 #define REG_PM_GPIO_01_H (REG_PM_GPIO_BASE + 0x03)
470 #define REG_PM_GPIO_02_L (REG_PM_GPIO_BASE + 0x04)
471 #define REG_PM_GPIO_02_H (REG_PM_GPIO_BASE + 0x05)
472 #define REG_PM_GPIO_03_L (REG_PM_GPIO_BASE + 0x06)
473 #define REG_PM_GPIO_03_H (REG_PM_GPIO_BASE + 0x07)
474 #define REG_PM_GPIO_04_L (REG_PM_GPIO_BASE + 0x08)
475 #define REG_PM_GPIO_04_H (REG_PM_GPIO_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_pm_sleep.h467 #define REG_PM_GPIO_00_L (REG_PM_GPIO_BASE + 0x00)
468 #define REG_PM_GPIO_00_H (REG_PM_GPIO_BASE + 0x01)
469 #define REG_PM_GPIO_01_L (REG_PM_GPIO_BASE + 0x02)
470 #define REG_PM_GPIO_01_H (REG_PM_GPIO_BASE + 0x03)
471 #define REG_PM_GPIO_02_L (REG_PM_GPIO_BASE + 0x04)
472 #define REG_PM_GPIO_02_H (REG_PM_GPIO_BASE + 0x05)
473 #define REG_PM_GPIO_03_L (REG_PM_GPIO_BASE + 0x06)
474 #define REG_PM_GPIO_03_H (REG_PM_GPIO_BASE + 0x07)
475 #define REG_PM_GPIO_04_L (REG_PM_GPIO_BASE + 0x08)
476 #define REG_PM_GPIO_04_H (REG_PM_GPIO_BASE + 0x09)
[all …]
H A Dmhal_xc_chip_config.h444 #define REG_PM_GPIO_BASE 0x000F00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_pm_sleep.h467 #define REG_PM_GPIO_00_L (REG_PM_GPIO_BASE + 0x00)
468 #define REG_PM_GPIO_00_H (REG_PM_GPIO_BASE + 0x01)
469 #define REG_PM_GPIO_01_L (REG_PM_GPIO_BASE + 0x02)
470 #define REG_PM_GPIO_01_H (REG_PM_GPIO_BASE + 0x03)
471 #define REG_PM_GPIO_02_L (REG_PM_GPIO_BASE + 0x04)
472 #define REG_PM_GPIO_02_H (REG_PM_GPIO_BASE + 0x05)
473 #define REG_PM_GPIO_03_L (REG_PM_GPIO_BASE + 0x06)
474 #define REG_PM_GPIO_03_H (REG_PM_GPIO_BASE + 0x07)
475 #define REG_PM_GPIO_04_L (REG_PM_GPIO_BASE + 0x08)
476 #define REG_PM_GPIO_04_H (REG_PM_GPIO_BASE + 0x09)
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H A Dmhal_xc_chip_config.h532 #define REG_PM_GPIO_BASE 0x000F00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_pm_sleep.h468 #define REG_PM_GPIO_00_L (REG_PM_GPIO_BASE + 0x00)
469 #define REG_PM_GPIO_00_H (REG_PM_GPIO_BASE + 0x01)
470 #define REG_PM_GPIO_01_L (REG_PM_GPIO_BASE + 0x02)
471 #define REG_PM_GPIO_01_H (REG_PM_GPIO_BASE + 0x03)
472 #define REG_PM_GPIO_02_L (REG_PM_GPIO_BASE + 0x04)
473 #define REG_PM_GPIO_02_H (REG_PM_GPIO_BASE + 0x05)
474 #define REG_PM_GPIO_03_L (REG_PM_GPIO_BASE + 0x06)
475 #define REG_PM_GPIO_03_H (REG_PM_GPIO_BASE + 0x07)
476 #define REG_PM_GPIO_04_L (REG_PM_GPIO_BASE + 0x08)
477 #define REG_PM_GPIO_04_H (REG_PM_GPIO_BASE + 0x09)
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/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_pm_sleep.h468 #define REG_PM_GPIO_00_L (REG_PM_GPIO_BASE + 0x00)
469 #define REG_PM_GPIO_00_H (REG_PM_GPIO_BASE + 0x01)
470 #define REG_PM_GPIO_01_L (REG_PM_GPIO_BASE + 0x02)
471 #define REG_PM_GPIO_01_H (REG_PM_GPIO_BASE + 0x03)
472 #define REG_PM_GPIO_02_L (REG_PM_GPIO_BASE + 0x04)
473 #define REG_PM_GPIO_02_H (REG_PM_GPIO_BASE + 0x05)
474 #define REG_PM_GPIO_03_L (REG_PM_GPIO_BASE + 0x06)
475 #define REG_PM_GPIO_03_H (REG_PM_GPIO_BASE + 0x07)
476 #define REG_PM_GPIO_04_L (REG_PM_GPIO_BASE + 0x08)
477 #define REG_PM_GPIO_04_H (REG_PM_GPIO_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_pm_sleep.h467 #define REG_PM_GPIO_00_L (REG_PM_GPIO_BASE + 0x00)
468 #define REG_PM_GPIO_00_H (REG_PM_GPIO_BASE + 0x01)
469 #define REG_PM_GPIO_01_L (REG_PM_GPIO_BASE + 0x02)
470 #define REG_PM_GPIO_01_H (REG_PM_GPIO_BASE + 0x03)
471 #define REG_PM_GPIO_02_L (REG_PM_GPIO_BASE + 0x04)
472 #define REG_PM_GPIO_02_H (REG_PM_GPIO_BASE + 0x05)
473 #define REG_PM_GPIO_03_L (REG_PM_GPIO_BASE + 0x06)
474 #define REG_PM_GPIO_03_H (REG_PM_GPIO_BASE + 0x07)
475 #define REG_PM_GPIO_04_L (REG_PM_GPIO_BASE + 0x08)
476 #define REG_PM_GPIO_04_H (REG_PM_GPIO_BASE + 0x09)
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H A Dmhal_xc_chip_config.h487 #define REG_PM_GPIO_BASE 0x000F00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_pm_sleep.h466 #define REG_PM_GPIO_00_L (REG_PM_GPIO_BASE + 0x00)
467 #define REG_PM_GPIO_00_H (REG_PM_GPIO_BASE + 0x01)
468 #define REG_PM_GPIO_01_L (REG_PM_GPIO_BASE + 0x02)
469 #define REG_PM_GPIO_01_H (REG_PM_GPIO_BASE + 0x03)
470 #define REG_PM_GPIO_02_L (REG_PM_GPIO_BASE + 0x04)
471 #define REG_PM_GPIO_02_H (REG_PM_GPIO_BASE + 0x05)
472 #define REG_PM_GPIO_03_L (REG_PM_GPIO_BASE + 0x06)
473 #define REG_PM_GPIO_03_H (REG_PM_GPIO_BASE + 0x07)
474 #define REG_PM_GPIO_04_L (REG_PM_GPIO_BASE + 0x08)
475 #define REG_PM_GPIO_04_H (REG_PM_GPIO_BASE + 0x09)
[all …]
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_pm_sleep.h467 #define REG_PM_GPIO_00_L (REG_PM_GPIO_BASE + 0x00)
468 #define REG_PM_GPIO_00_H (REG_PM_GPIO_BASE + 0x01)
469 #define REG_PM_GPIO_01_L (REG_PM_GPIO_BASE + 0x02)
470 #define REG_PM_GPIO_01_H (REG_PM_GPIO_BASE + 0x03)
471 #define REG_PM_GPIO_02_L (REG_PM_GPIO_BASE + 0x04)
472 #define REG_PM_GPIO_02_H (REG_PM_GPIO_BASE + 0x05)
473 #define REG_PM_GPIO_03_L (REG_PM_GPIO_BASE + 0x06)
474 #define REG_PM_GPIO_03_H (REG_PM_GPIO_BASE + 0x07)
475 #define REG_PM_GPIO_04_L (REG_PM_GPIO_BASE + 0x08)
476 #define REG_PM_GPIO_04_H (REG_PM_GPIO_BASE + 0x09)
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H A Dmhal_xc_chip_config.h550 #define REG_PM_GPIO_BASE 0x000F00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_pm_sleep.h467 #define REG_PM_GPIO_00_L (REG_PM_GPIO_BASE + 0x00)
468 #define REG_PM_GPIO_00_H (REG_PM_GPIO_BASE + 0x01)
469 #define REG_PM_GPIO_01_L (REG_PM_GPIO_BASE + 0x02)
470 #define REG_PM_GPIO_01_H (REG_PM_GPIO_BASE + 0x03)
471 #define REG_PM_GPIO_02_L (REG_PM_GPIO_BASE + 0x04)
472 #define REG_PM_GPIO_02_H (REG_PM_GPIO_BASE + 0x05)
473 #define REG_PM_GPIO_03_L (REG_PM_GPIO_BASE + 0x06)
474 #define REG_PM_GPIO_03_H (REG_PM_GPIO_BASE + 0x07)
475 #define REG_PM_GPIO_04_L (REG_PM_GPIO_BASE + 0x08)
476 #define REG_PM_GPIO_04_H (REG_PM_GPIO_BASE + 0x09)
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H A Dmhal_xc_chip_config.h545 #define REG_PM_GPIO_BASE 0x000F00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dmhal_xc_chip_config.h462 #define REG_PM_GPIO_BASE 0x000F00UL macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dmhal_xc_chip_config.h460 #define REG_PM_GPIO_BASE 0x000F00UL macro