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Searched refs:REG_MHL_ECBUS_PHY_6F (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhalMHL.c1269 W2BYTEMSK(REG_MHL_ECBUS_PHY_6F, bEnableFlag? BIT(8): 0, BIT(8)); // ECbus clock detect in _mhal_mhl_ECbusEnableSetting()
3823 if(R2BYTE(REG_MHL_ECBUS_PHY_6F) &BIT(13)) // [13]: ECbus clock lock flag in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h623 #define REG_MHL_ECBUS_PHY_6F (REG_MHL_ECBUS_PHY_BANK + 0xDE) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhalMHL.c1269 W2BYTEMSK(REG_MHL_ECBUS_PHY_6F, bEnableFlag? BIT(8): 0, BIT(8)); // ECbus clock detect in _mhal_mhl_ECbusEnableSetting()
3823 if(R2BYTE(REG_MHL_ECBUS_PHY_6F) &BIT(13)) // [13]: ECbus clock lock flag in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h623 #define REG_MHL_ECBUS_PHY_6F (REG_MHL_ECBUS_PHY_BANK + 0xDE) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhwregMHL.h623 #define REG_MHL_ECBUS_PHY_6F (REG_MHL_ECBUS_PHY_BANK + 0xDE) macro
H A DhalMHL.c1591 W2BYTEMSK(REG_MHL_ECBUS_PHY_6F, bEnableFlag? BIT(8): 0, BIT(8)); // ECbus clock detect in _mhal_mhl_ECbusEnableSetting()
4291 if(R2BYTE(REG_MHL_ECBUS_PHY_6F) &BIT(13)) // [13]: ECbus clock lock flag in mhal_mhl_GetECbusStatusFlag()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhwregMHL.h623 #define REG_MHL_ECBUS_PHY_6F (REG_MHL_ECBUS_PHY_BANK + 0xDE) macro
H A DhalMHL.c1537 W2BYTEMSK(REG_MHL_ECBUS_PHY_6F, bEnableFlag? BIT(8): 0, BIT(8)); // ECbus clock detect in _mhal_mhl_ECbusEnableSetting()
4734 if(R2BYTE(REG_MHL_ECBUS_PHY_6F) &BIT(13)) // [13]: ECbus clock lock flag in mhal_mhl_GetECbusStatusFlag()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhwregMHL.h623 #define REG_MHL_ECBUS_PHY_6F (REG_MHL_ECBUS_PHY_BANK + 0xDE) macro
H A DhalMHL.c1537 W2BYTEMSK(REG_MHL_ECBUS_PHY_6F, bEnableFlag? BIT(8): 0, BIT(8)); // ECbus clock detect in _mhal_mhl_ECbusEnableSetting()
4734 if(R2BYTE(REG_MHL_ECBUS_PHY_6F) &BIT(13)) // [13]: ECbus clock lock flag in mhal_mhl_GetECbusStatusFlag()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhwregMHL.h623 #define REG_MHL_ECBUS_PHY_6F (REG_MHL_ECBUS_PHY_BANK + 0xDE) macro
H A DhalMHL.c1575 W2BYTEMSK(REG_MHL_ECBUS_PHY_6F, bEnableFlag? BIT(8): 0, BIT(8)); // ECbus clock detect in _mhal_mhl_ECbusEnableSetting()
4267 if(R2BYTE(REG_MHL_ECBUS_PHY_6F) &BIT(13)) // [13]: ECbus clock lock flag in mhal_mhl_GetECbusStatusFlag()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhwregMHL.h623 #define REG_MHL_ECBUS_PHY_6F (REG_MHL_ECBUS_PHY_BANK + 0xDE) macro
H A DhalMHL.c1537 W2BYTEMSK(REG_MHL_ECBUS_PHY_6F, bEnableFlag? BIT(8): 0, BIT(8)); // ECbus clock detect in _mhal_mhl_ECbusEnableSetting()
4734 if(R2BYTE(REG_MHL_ECBUS_PHY_6F) &BIT(13)) // [13]: ECbus clock lock flag in mhal_mhl_GetECbusStatusFlag()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhwregMHL.h623 #define REG_MHL_ECBUS_PHY_6F (REG_MHL_ECBUS_PHY_BANK + 0xDE) macro
H A DhalMHL.c1537 W2BYTEMSK(REG_MHL_ECBUS_PHY_6F, bEnableFlag? BIT(8): 0, BIT(8)); // ECbus clock detect in _mhal_mhl_ECbusEnableSetting()
4734 if(R2BYTE(REG_MHL_ECBUS_PHY_6F) &BIT(13)) // [13]: ECbus clock lock flag in mhal_mhl_GetECbusStatusFlag()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhwregMHL.h623 #define REG_MHL_ECBUS_PHY_6F (REG_MHL_ECBUS_PHY_BANK + 0xDE) macro
H A DhalMHL.c1537 W2BYTEMSK(REG_MHL_ECBUS_PHY_6F, bEnableFlag? BIT(8): 0, BIT(8)); // ECbus clock detect in _mhal_mhl_ECbusEnableSetting()
4734 if(R2BYTE(REG_MHL_ECBUS_PHY_6F) &BIT(13)) // [13]: ECbus clock lock flag in mhal_mhl_GetECbusStatusFlag()