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Searched refs:REG_MHL_ECBUS_PHY_69 (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhalMHL.c1128 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x35, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1153 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x50, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1181 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, BIT(10), BMASK(11:10)); // [11:10]:reg_txloc_set_time in _mhal_mhl_ECbusInitialSetting()
3815 MS_U8 ucTrainState = (R2BYTE(REG_MHL_ECBUS_PHY_69) >> 12); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h617 #define REG_MHL_ECBUS_PHY_69 (REG_MHL_ECBUS_PHY_BANK + 0xD2) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhalMHL.c1128 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x35, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1153 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x50, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1181 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, BIT(10), BMASK(11:10)); // [11:10]:reg_txloc_set_time in _mhal_mhl_ECbusInitialSetting()
3815 MS_U8 ucTrainState = (R2BYTE(REG_MHL_ECBUS_PHY_69) >> 12); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h617 #define REG_MHL_ECBUS_PHY_69 (REG_MHL_ECBUS_PHY_BANK + 0xD2) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c1434 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x35, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1459 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x50, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1487 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, BIT(10), BMASK(11:10)); // [11:10]:reg_txloc_set_time in _mhal_mhl_ECbusInitialSetting()
4259 MS_U8 ucTrainState = (R2BYTE(REG_MHL_ECBUS_PHY_69) >> 12); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h617 #define REG_MHL_ECBUS_PHY_69 (REG_MHL_ECBUS_PHY_BANK + 0xD2) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c1450 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x35, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1475 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x50, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1503 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, BIT(10), BMASK(11:10)); // [11:10]:reg_txloc_set_time in _mhal_mhl_ECbusInitialSetting()
4283 MS_U8 ucTrainState = (R2BYTE(REG_MHL_ECBUS_PHY_69) >> 12); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h617 #define REG_MHL_ECBUS_PHY_69 (REG_MHL_ECBUS_PHY_BANK + 0xD2) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c1396 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x35, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1421 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x50, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1449 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, BIT(10), BMASK(11:10)); // [11:10]:reg_txloc_set_time in _mhal_mhl_ECbusInitialSetting()
4731 MS_U8 ucTrainState = (R2BYTE(REG_MHL_ECBUS_PHY_69) >> 12); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h617 #define REG_MHL_ECBUS_PHY_69 (REG_MHL_ECBUS_PHY_BANK + 0xD2) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c1396 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x35, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1421 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x50, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1449 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, BIT(10), BMASK(11:10)); // [11:10]:reg_txloc_set_time in _mhal_mhl_ECbusInitialSetting()
4731 MS_U8 ucTrainState = (R2BYTE(REG_MHL_ECBUS_PHY_69) >> 12); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h617 #define REG_MHL_ECBUS_PHY_69 (REG_MHL_ECBUS_PHY_BANK + 0xD2) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c1396 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x35, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1421 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x50, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1449 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, BIT(10), BMASK(11:10)); // [11:10]:reg_txloc_set_time in _mhal_mhl_ECbusInitialSetting()
4731 MS_U8 ucTrainState = (R2BYTE(REG_MHL_ECBUS_PHY_69) >> 12); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h617 #define REG_MHL_ECBUS_PHY_69 (REG_MHL_ECBUS_PHY_BANK + 0xD2) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c1396 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x35, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1421 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x50, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1449 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, BIT(10), BMASK(11:10)); // [11:10]:reg_txloc_set_time in _mhal_mhl_ECbusInitialSetting()
4731 MS_U8 ucTrainState = (R2BYTE(REG_MHL_ECBUS_PHY_69) >> 12); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h617 #define REG_MHL_ECBUS_PHY_69 (REG_MHL_ECBUS_PHY_BANK + 0xD2) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c1396 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x35, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1421 …W2BYTEMSK(REG_MHL_ECBUS_PHY_69, 0x50, BMASK(6:4)| BMASK(2:0)); // [6:4]: rasing pattern type, [2:0… in _mhal_mhl_ECbusInitialSetting()
1449 W2BYTEMSK(REG_MHL_ECBUS_PHY_69, BIT(10), BMASK(11:10)); // [11:10]:reg_txloc_set_time in _mhal_mhl_ECbusInitialSetting()
4731 MS_U8 ucTrainState = (R2BYTE(REG_MHL_ECBUS_PHY_69) >> 12); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h617 #define REG_MHL_ECBUS_PHY_69 (REG_MHL_ECBUS_PHY_BANK + 0xD2) macro