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Searched refs:REG_MHL_ECBUS_PHY_5C (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhwregMHL.h604 #define REG_MHL_ECBUS_PHY_5C (REG_MHL_ECBUS_PHY_BANK + 0xB8) macro
H A DhalMHL.c1500 …W2BYTEMSK(REG_MHL_ECBUS_PHY_5C, 0x010A, BMASK(15:0)); // [10:8]:reg_txloc_golden_lowr_tol, [5:0… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhwregMHL.h604 #define REG_MHL_ECBUS_PHY_5C (REG_MHL_ECBUS_PHY_BANK + 0xB8) macro
H A DhalMHL.c1178 …W2BYTEMSK(REG_MHL_ECBUS_PHY_5C, 0x010A, BMASK(15:0)); // [10:8]:reg_txloc_golden_lowr_tol, [5:0… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhwregMHL.h604 #define REG_MHL_ECBUS_PHY_5C (REG_MHL_ECBUS_PHY_BANK + 0xB8) macro
H A DhalMHL.c1446 …W2BYTEMSK(REG_MHL_ECBUS_PHY_5C, 0x010A, BMASK(15:0)); // [10:8]:reg_txloc_golden_lowr_tol, [5:0… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhwregMHL.h604 #define REG_MHL_ECBUS_PHY_5C (REG_MHL_ECBUS_PHY_BANK + 0xB8) macro
H A DhalMHL.c1178 …W2BYTEMSK(REG_MHL_ECBUS_PHY_5C, 0x010A, BMASK(15:0)); // [10:8]:reg_txloc_golden_lowr_tol, [5:0… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhwregMHL.h604 #define REG_MHL_ECBUS_PHY_5C (REG_MHL_ECBUS_PHY_BANK + 0xB8) macro
H A DhalMHL.c1446 …W2BYTEMSK(REG_MHL_ECBUS_PHY_5C, 0x010A, BMASK(15:0)); // [10:8]:reg_txloc_golden_lowr_tol, [5:0… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhwregMHL.h604 #define REG_MHL_ECBUS_PHY_5C (REG_MHL_ECBUS_PHY_BANK + 0xB8) macro
H A DhalMHL.c1484 …W2BYTEMSK(REG_MHL_ECBUS_PHY_5C, 0x010A, BMASK(15:0)); // [10:8]:reg_txloc_golden_lowr_tol, [5:0… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhwregMHL.h604 #define REG_MHL_ECBUS_PHY_5C (REG_MHL_ECBUS_PHY_BANK + 0xB8) macro
H A DhalMHL.c1446 …W2BYTEMSK(REG_MHL_ECBUS_PHY_5C, 0x010A, BMASK(15:0)); // [10:8]:reg_txloc_golden_lowr_tol, [5:0… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhwregMHL.h604 #define REG_MHL_ECBUS_PHY_5C (REG_MHL_ECBUS_PHY_BANK + 0xB8) macro
H A DhalMHL.c1446 …W2BYTEMSK(REG_MHL_ECBUS_PHY_5C, 0x010A, BMASK(15:0)); // [10:8]:reg_txloc_golden_lowr_tol, [5:0… in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhwregMHL.h604 #define REG_MHL_ECBUS_PHY_5C (REG_MHL_ECBUS_PHY_BANK + 0xB8) macro
H A DhalMHL.c1446 …W2BYTEMSK(REG_MHL_ECBUS_PHY_5C, 0x010A, BMASK(15:0)); // [10:8]:reg_txloc_golden_lowr_tol, [5:0… in _mhal_mhl_ECbusInitialSetting()