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Searched refs:REG_MHL_ECBUS_PHY_51 (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhalMHL.c1133 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, 0x0100, BMASK(15:0)); in _mhal_mhl_ECbusInitialSetting()
1161 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, BIT(11), BIT(11)); // in _mhal_mhl_ECbusInitialSetting()
H A DhwregMHL.h593 #define REG_MHL_ECBUS_PHY_51 (REG_MHL_ECBUS_PHY_BANK + 0xA2) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhalMHL.c1133 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, 0x0100, BMASK(15:0)); in _mhal_mhl_ECbusInitialSetting()
1161 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, BIT(11), BIT(11)); // in _mhal_mhl_ECbusInitialSetting()
H A DhwregMHL.h593 #define REG_MHL_ECBUS_PHY_51 (REG_MHL_ECBUS_PHY_BANK + 0xA2) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhwregMHL.h593 #define REG_MHL_ECBUS_PHY_51 (REG_MHL_ECBUS_PHY_BANK + 0xA2) macro
H A DhalMHL.c1455 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, 0x0100, BMASK(15:0)); in _mhal_mhl_ECbusInitialSetting()
1483 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, BIT(11), BIT(11)); // in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhwregMHL.h593 #define REG_MHL_ECBUS_PHY_51 (REG_MHL_ECBUS_PHY_BANK + 0xA2) macro
H A DhalMHL.c1401 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, 0x0100, BMASK(15:0)); in _mhal_mhl_ECbusInitialSetting()
1429 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, BIT(11), BIT(11)); // in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhwregMHL.h593 #define REG_MHL_ECBUS_PHY_51 (REG_MHL_ECBUS_PHY_BANK + 0xA2) macro
H A DhalMHL.c1401 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, 0x0100, BMASK(15:0)); in _mhal_mhl_ECbusInitialSetting()
1429 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, BIT(11), BIT(11)); // in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhwregMHL.h593 #define REG_MHL_ECBUS_PHY_51 (REG_MHL_ECBUS_PHY_BANK + 0xA2) macro
H A DhalMHL.c1439 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, 0x0100, BMASK(15:0)); in _mhal_mhl_ECbusInitialSetting()
1467 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, BIT(11), BIT(11)); // in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhwregMHL.h593 #define REG_MHL_ECBUS_PHY_51 (REG_MHL_ECBUS_PHY_BANK + 0xA2) macro
H A DhalMHL.c1401 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, 0x0100, BMASK(15:0)); in _mhal_mhl_ECbusInitialSetting()
1429 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, BIT(11), BIT(11)); // in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhwregMHL.h593 #define REG_MHL_ECBUS_PHY_51 (REG_MHL_ECBUS_PHY_BANK + 0xA2) macro
H A DhalMHL.c1401 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, 0x0100, BMASK(15:0)); in _mhal_mhl_ECbusInitialSetting()
1429 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, BIT(11), BIT(11)); // in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhwregMHL.h593 #define REG_MHL_ECBUS_PHY_51 (REG_MHL_ECBUS_PHY_BANK + 0xA2) macro
H A DhalMHL.c1401 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, 0x0100, BMASK(15:0)); in _mhal_mhl_ECbusInitialSetting()
1429 W2BYTEMSK(REG_MHL_ECBUS_PHY_51, BIT(11), BIT(11)); // in _mhal_mhl_ECbusInitialSetting()