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Searched refs:REG_MHL_ECBUS_PHY_4A (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhalMHL.c1403 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); // [14:13] in _mhal_mhl_ECbusInitialSetting()
1454 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(8)| 0x22, BIT(8)| BMASK(7:4)); in _mhal_mhl_ECbusInitialSetting()
1538 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, bEnableFlag? 0: BIT(13), BIT(13)); in _mhal_mhl_ECbusEnableSetting()
1568 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, 0, BIT(13)); in _mhal_mhl_ECbusBISTSetting()
1571 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(14), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1581 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1587 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1601 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusBISTSetting()
1604 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1826 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeUpProc()
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H A DhwregMHL.h586 #define REG_MHL_ECBUS_PHY_4A (REG_MHL_ECBUS_PHY_BANK + 0x94) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhalMHL.c1403 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); // [14:13] in _mhal_mhl_ECbusInitialSetting()
1454 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(8)| 0x22, BIT(8)| BMASK(7:4)); in _mhal_mhl_ECbusInitialSetting()
1538 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, bEnableFlag? 0: BIT(13), BIT(13)); in _mhal_mhl_ECbusEnableSetting()
1568 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, 0, BIT(13)); in _mhal_mhl_ECbusBISTSetting()
1571 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(14), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1581 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1587 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1601 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusBISTSetting()
1604 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1826 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeUpProc()
[all …]
H A DhwregMHL.h586 #define REG_MHL_ECBUS_PHY_4A (REG_MHL_ECBUS_PHY_BANK + 0x94) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhalMHL.c1403 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); // [14:13] in _mhal_mhl_ECbusInitialSetting()
1454 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(8)| 0x22, BIT(8)| BMASK(7:4)); in _mhal_mhl_ECbusInitialSetting()
1538 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, bEnableFlag? 0: BIT(13), BIT(13)); in _mhal_mhl_ECbusEnableSetting()
1568 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, 0, BIT(13)); in _mhal_mhl_ECbusBISTSetting()
1571 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(14), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1581 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1587 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1601 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusBISTSetting()
1604 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1826 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeUpProc()
[all …]
H A DhwregMHL.h586 #define REG_MHL_ECBUS_PHY_4A (REG_MHL_ECBUS_PHY_BANK + 0x94) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhalMHL.c1403 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); // [14:13] in _mhal_mhl_ECbusInitialSetting()
1454 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(8)| 0x22, BIT(8)| BMASK(7:4)); in _mhal_mhl_ECbusInitialSetting()
1538 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, bEnableFlag? 0: BIT(13), BIT(13)); in _mhal_mhl_ECbusEnableSetting()
1568 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, 0, BIT(13)); in _mhal_mhl_ECbusBISTSetting()
1571 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(14), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1581 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1587 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1601 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusBISTSetting()
1604 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1826 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeUpProc()
[all …]
H A DhwregMHL.h586 #define REG_MHL_ECBUS_PHY_4A (REG_MHL_ECBUS_PHY_BANK + 0x94) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhalMHL.c1403 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); // [14:13] in _mhal_mhl_ECbusInitialSetting()
1454 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(8)| 0x22, BIT(8)| BMASK(7:4)); in _mhal_mhl_ECbusInitialSetting()
1538 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, bEnableFlag? 0: BIT(13), BIT(13)); in _mhal_mhl_ECbusEnableSetting()
1568 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, 0, BIT(13)); in _mhal_mhl_ECbusBISTSetting()
1571 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(14), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1581 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1587 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1601 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusBISTSetting()
1604 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); in _mhal_mhl_ECbusBISTSetting()
1826 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeUpProc()
[all …]
H A DhwregMHL.h586 #define REG_MHL_ECBUS_PHY_4A (REG_MHL_ECBUS_PHY_BANK + 0x94) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhalMHL.c1135 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); // [14:13] in _mhal_mhl_ECbusInitialSetting()
1186 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(8)| 0x22, BIT(8)| BMASK(7:4)); in _mhal_mhl_ECbusInitialSetting()
1270 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, bEnableFlag? 0: BIT(13), BIT(13)); in _mhal_mhl_ECbusEnableSetting()
1452 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13));// in _mhal_mhl_ECbusStateChangeProc()
1485 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeUpProc()
1503 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeDownProc()
3832 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, 0, BIT(13)); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h586 #define REG_MHL_ECBUS_PHY_4A (REG_MHL_ECBUS_PHY_BANK + 0x94) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhalMHL.c1135 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); // [14:13] in _mhal_mhl_ECbusInitialSetting()
1186 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(8)| 0x22, BIT(8)| BMASK(7:4)); in _mhal_mhl_ECbusInitialSetting()
1270 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, bEnableFlag? 0: BIT(13), BIT(13)); in _mhal_mhl_ECbusEnableSetting()
1452 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13));// in _mhal_mhl_ECbusStateChangeProc()
1485 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeUpProc()
1503 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeDownProc()
3832 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, 0, BIT(13)); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h586 #define REG_MHL_ECBUS_PHY_4A (REG_MHL_ECBUS_PHY_BANK + 0x94) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhalMHL.c1441 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); // [14:13] in _mhal_mhl_ECbusInitialSetting()
1492 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(8)| 0x33, BIT(8)| BMASK(7:4)); in _mhal_mhl_ECbusInitialSetting()
1576 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, bEnableFlag? 0: BIT(13), BIT(13)); in _mhal_mhl_ECbusEnableSetting()
1764 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13));// in _mhal_mhl_ECbusStateChangeProc()
1797 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeUpProc()
1815 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeDownProc()
4276 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, 0, BIT(13)); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h586 #define REG_MHL_ECBUS_PHY_4A (REG_MHL_ECBUS_PHY_BANK + 0x94) macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhalMHL.c1457 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BMASK(14:13), BMASK(14:13)); // [14:13] in _mhal_mhl_ECbusInitialSetting()
1508 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(8)| 0x33, BIT(8)| BMASK(7:4)); in _mhal_mhl_ECbusInitialSetting()
1592 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, bEnableFlag? 0: BIT(13), BIT(13)); in _mhal_mhl_ECbusEnableSetting()
1780 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13));// in _mhal_mhl_ECbusStateChangeProc()
1813 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeUpProc()
1831 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, BIT(13), BIT(13)); in _mhal_mhl_ECbusModeDownProc()
4300 W2BYTEMSK(REG_MHL_ECBUS_PHY_4A, 0, BIT(13)); in mhal_mhl_GetECbusStatusFlag()
H A DhwregMHL.h586 #define REG_MHL_ECBUS_PHY_4A (REG_MHL_ECBUS_PHY_BANK + 0x94) macro