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Searched refs:REG_MHL_ECBUS_02 (Results 1 – 18 of 18) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/macan/mhl/internal/
H A DhwregMHL.h382 #define REG_MHL_ECBUS_02 (REG_MHL_ECBUS_BANK + 0x04) macro
H A DhalMHL.c1471 W2BYTEMSK(REG_MHL_ECBUS_02, BIT(7), BMASK(13:8)| BIT(7)); // [7] in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mainz/mhl/internal/
H A DhwregMHL.h382 #define REG_MHL_ECBUS_02 (REG_MHL_ECBUS_BANK + 0x04) macro
H A DhalMHL.c1149 W2BYTEMSK(REG_MHL_ECBUS_02, BIT(7), BMASK(13:8)| BIT(7)); // [7] in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/mhl/internal/
H A DhwregMHL.h382 #define REG_MHL_ECBUS_02 (REG_MHL_ECBUS_BANK + 0x04) macro
H A DhalMHL.c1417 W2BYTEMSK(REG_MHL_ECBUS_02, BIT(7), BMASK(13:8)| BIT(7)); // [7] in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/messi/mhl/internal/
H A DhwregMHL.h382 #define REG_MHL_ECBUS_02 (REG_MHL_ECBUS_BANK + 0x04) macro
H A DhalMHL.c1149 W2BYTEMSK(REG_MHL_ECBUS_02, BIT(7), BMASK(13:8)| BIT(7)); // [7] in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/manhattan/mhl/internal/
H A DhwregMHL.h382 #define REG_MHL_ECBUS_02 (REG_MHL_ECBUS_BANK + 0x04) macro
H A DhalMHL.c1417 W2BYTEMSK(REG_MHL_ECBUS_02, BIT(7), BMASK(13:8)| BIT(7)); // [7] in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/mooney/mhl/internal/
H A DhwregMHL.h382 #define REG_MHL_ECBUS_02 (REG_MHL_ECBUS_BANK + 0x04) macro
H A DhalMHL.c1455 W2BYTEMSK(REG_MHL_ECBUS_02, BIT(7), BMASK(13:8)| BIT(7)); // [7] in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maserati/mhl/internal/
H A DhwregMHL.h382 #define REG_MHL_ECBUS_02 (REG_MHL_ECBUS_BANK + 0x04) macro
H A DhalMHL.c1417 W2BYTEMSK(REG_MHL_ECBUS_02, BIT(7), BMASK(13:8)| BIT(7)); // [7] in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/mhl/internal/
H A DhwregMHL.h382 #define REG_MHL_ECBUS_02 (REG_MHL_ECBUS_BANK + 0x04) macro
H A DhalMHL.c1417 W2BYTEMSK(REG_MHL_ECBUS_02, BIT(7), BMASK(13:8)| BIT(7)); // [7] in _mhal_mhl_ECbusInitialSetting()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7821/mhl/internal/
H A DhwregMHL.h382 #define REG_MHL_ECBUS_02 (REG_MHL_ECBUS_BANK + 0x04) macro
H A DhalMHL.c1417 W2BYTEMSK(REG_MHL_ECBUS_02, BIT(7), BMASK(13:8)| BIT(7)); // [7] in _mhal_mhl_ECbusInitialSetting()