Home
last modified time | relevance | path

Searched refs:REG_IRQHYP_MASK_L (Results 1 – 10 of 10) sorted by relevance

/utopia/UTPA2-700.0.x/mxlib/hal/k7u/
H A DhalCHIP.c516 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
539 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_EnableIRQ()
595 IRQHYP_REG(REG_IRQHYP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
618 IRQHYP_REG(REG_IRQHYP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_DisableIRQ()
1652 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
1675 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_EnableIRQ()
1731 IRQHYP_REG(REG_IRQHYP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
1754 IRQHYP_REG(REG_IRQHYP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_DisableIRQ()
H A DregCHIP.h177 #define REG_IRQHYP_MASK_L (REG_INT_BASE_ADDR + 0x0014) macro
/utopia/UTPA2-700.0.x/mxlib/hal/k6lite/
H A DhalCHIP.c516 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
539 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_EnableIRQ()
595 IRQHYP_REG(REG_IRQHYP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
618 IRQHYP_REG(REG_IRQHYP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_DisableIRQ()
1652 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
1675 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_EnableIRQ()
1731 IRQHYP_REG(REG_IRQHYP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
1754 IRQHYP_REG(REG_IRQHYP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_DisableIRQ()
H A DregCHIP.h177 #define REG_IRQHYP_MASK_L (REG_INT_BASE_ADDR + 0x0014) macro
/utopia/UTPA2-700.0.x/mxlib/hal/curry/
H A DhalCHIP.c516 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
539 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_EnableIRQ()
595 IRQHYP_REG(REG_IRQHYP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
618 IRQHYP_REG(REG_IRQHYP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_DisableIRQ()
1639 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
1662 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_EnableIRQ()
1718 IRQHYP_REG(REG_IRQHYP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
1741 IRQHYP_REG(REG_IRQHYP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_DisableIRQ()
H A DregCHIP.h177 #define REG_IRQHYP_MASK_L (REG_INT_BASE_ADDR + 0x0014) macro
/utopia/UTPA2-700.0.x/mxlib/hal/kano/
H A DhalCHIP.c516 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
539 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_EnableIRQ()
595 IRQHYP_REG(REG_IRQHYP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
618 IRQHYP_REG(REG_IRQHYP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_DisableIRQ()
1652 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
1675 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_EnableIRQ()
1731 IRQHYP_REG(REG_IRQHYP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
1754 IRQHYP_REG(REG_IRQHYP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_DisableIRQ()
H A DregCHIP.h177 #define REG_IRQHYP_MASK_L (REG_INT_BASE_ADDR + 0x0014) macro
/utopia/UTPA2-700.0.x/mxlib/hal/k6/
H A DhalCHIP.c516 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
539 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_EnableIRQ()
595 IRQHYP_REG(REG_IRQHYP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
618 IRQHYP_REG(REG_IRQHYP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_DisableIRQ()
1652 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~0xFFFF; in CHIP_EnableIRQ()
1675 IRQHYP_REG(REG_IRQHYP_MASK_L) &= ~(0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_EnableIRQ()
1731 IRQHYP_REG(REG_IRQHYP_MASK_L) |= 0xFFFF; in CHIP_DisableIRQ()
1754 IRQHYP_REG(REG_IRQHYP_MASK_L) |= (0x01 << (u8VectorIndex - E_IRQHYPL_START)); in CHIP_DisableIRQ()
H A DregCHIP.h177 #define REG_IRQHYP_MASK_L (REG_INT_BASE_ADDR + 0x0014) macro