| /utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/ |
| H A D | mhal_ip.c | 784 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 796 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 808 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 821 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/ |
| H A D | mhal_ip.c | 784 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 796 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 808 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 821 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_ip.c | 720 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 732 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 744 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 757 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_ip.c | 867 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 879 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 891 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 904 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_ip.c | 914 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 926 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 938 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 951 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_ip.c | 867 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 879 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 891 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 904 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_ip.c | 867 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 879 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 891 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 904 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/ |
| H A D | mhal_ip.c | 871 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 883 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 895 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 908 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/ |
| H A D | mhal_ip.c | 720 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 732 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 744 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 757 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_ip.c | 720 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 732 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 744 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 757 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_ip.c | 870 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 882 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 894 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 907 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/ |
| H A D | mhal_ip.c | 720 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 732 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 744 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 757 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_ip.c | 871 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 883 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 895 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 908 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/ |
| H A D | mhal_ip.c | 870 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 882 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 894 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 907 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_ip.c | 867 W2BYTE(REG_IPMUX_15_L, 0x05F0); //Htotal 0x035A in Hal_SC_IPMux_Gen_SpecificTiming() 879 W2BYTE(REG_IPMUX_15_L, 0x035A); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 891 W2BYTE(REG_IPMUX_15_L, 0x0690); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming() 904 W2BYTE(REG_IPMUX_15_L, 0x0898); //Htotal in Hal_SC_IPMux_Gen_SpecificTiming()
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| /utopia/UTPA2-700.0.x/modules/xc/drv/xc/include/ |
| H A D | hwreg_ipmux.h | 145 #define REG_IPMUX_15_L (REG_IPMUX_BASE + 0x2A) macro
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