| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/mainz/hwi2c/ |
| H A D | regHWI2C.h | 191 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| H A D | halHWI2C.c | 503 return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u32PortOffset, u32StartOffset); in HAL_HWI2C_DMA_SetMiuAddr()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/mooney/hwi2c/ |
| H A D | regHWI2C.h | 213 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| H A D | halHWI2C.c | 501 return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u32PortOffset, u32StartOffset); in HAL_HWI2C_DMA_SetMiuAddr()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/mustang/hwi2c/ |
| H A D | regHWI2C.h | 211 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| H A D | halHWI2C.c | 496 return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u32PortOffset, u32MiuAddr); in HAL_HWI2C_DMA_SetMiuAddr()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/messi/hwi2c/ |
| H A D | regHWI2C.h | 213 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| H A D | halHWI2C.c | 503 return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u32PortOffset, u32StartOffset); in HAL_HWI2C_DMA_SetMiuAddr()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/maldives/hwi2c/ |
| H A D | regHWI2C.h | 211 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| H A D | halHWI2C.c | 496 return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u32PortOffset, u32MiuAddr); in HAL_HWI2C_DMA_SetMiuAddr()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/macan/hwi2c/ |
| H A D | regHWI2C.h | 213 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| H A D | halHWI2C.c | 501 return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u32PortOffset, u32StartOffset); in HAL_HWI2C_DMA_SetMiuAddr()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/manhattan/hwi2c/ |
| H A D | regHWI2C.h | 231 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7821/hwi2c/ |
| H A D | regHWI2C.h | 231 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/maserati/hwi2c/ |
| H A D | regHWI2C.h | 231 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/M7621/hwi2c/ |
| H A D | regHWI2C.h | 231 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/maxim/hwi2c/ |
| H A D | regHWI2C.h | 231 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/k6lite/hwi2c/ |
| H A D | regHWI2C.h | 215 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| H A D | halHWI2C.c | 708 return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u16PortOffset, u32MiuAddr); in HAL_HWI2C_DMA_SetMiuAddr()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/kano/hwi2c/ |
| H A D | regHWI2C.h | 215 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| H A D | halHWI2C.c | 708 return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u16PortOffset, u32MiuAddr); in HAL_HWI2C_DMA_SetMiuAddr()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/k6/hwi2c/ |
| H A D | regHWI2C.h | 215 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| H A D | halHWI2C.c | 708 return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u16PortOffset, u32MiuAddr); in HAL_HWI2C_DMA_SetMiuAddr()
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| /utopia/UTPA2-700.0.x/modules/hwi2c/hal/curry/hwi2c/ |
| H A D | regHWI2C.h | 215 #define REG_HWI2C_DMA_MIU_ADR (HWI2C_REG_BASE+0x21*2) // 4 bytes macro
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| H A D | halHWI2C.c | 708 return HAL_HWI2C_Write4Byte(REG_HWI2C_DMA_MIU_ADR+u16PortOffset, u32MiuAddr); in HAL_HWI2C_DMA_SetMiuAddr()
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