| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/ |
| H A D | mhal_hdmi.c | 1616 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, BIT(13)|BIT(15), BIT(13)|BIT(15)); // clr Dolby EDR enable in _Hal_tmds_ClearEDRVaildFlag()
1617 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, 0, BIT(13)|BIT(15)); in _Hal_tmds_ClearEDRVaildFlag()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/ |
| H A D | mhal_hdmi.c | 2735 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, BIT(13)|BIT(15), BIT(13)|BIT(15)); // clr Dolby EDR enable in _Hal_tmds_ClearEDRVaildFlag()
2736 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, 0, BIT(13)|BIT(15)); in _Hal_tmds_ClearEDRVaildFlag()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/ |
| H A D | mhal_hdmi.c | 2772 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, BIT(13)|BIT(15), BIT(13)|BIT(15)); // clr Dolby EDR enable in _Hal_tmds_ClearEDRVaildFlag()
2773 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, 0, BIT(13)|BIT(15)); in _Hal_tmds_ClearEDRVaildFlag()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/ |
| H A D | mhal_hdmi.c | 2772 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, BIT(13)|BIT(15), BIT(13)|BIT(15)); // clr Dolby EDR enable in _Hal_tmds_ClearEDRVaildFlag()
2773 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, 0, BIT(13)|BIT(15)); in _Hal_tmds_ClearEDRVaildFlag()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/ |
| H A D | mhal_hdmi.c | 2764 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, BIT(13)|BIT(15), BIT(13)|BIT(15)); // clr Dolby EDR enable in _Hal_tmds_ClearEDRVaildFlag()
2765 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, 0, BIT(13)|BIT(15)); in _Hal_tmds_ClearEDRVaildFlag()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/ |
| H A D | mhal_hdmi.c | 2766 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, BIT(13)|BIT(15), BIT(13)|BIT(15)); // clr Dolby EDR enable in _Hal_tmds_ClearEDRVaildFlag()
2767 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, 0, BIT(13)|BIT(15)); in _Hal_tmds_ClearEDRVaildFlag()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/ |
| H A D | mhal_hdmi.c | 2932 …W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L +usHDMIBankOffset, BIT(13)|BIT(15), BIT(13)|BIT(15)); // clr Dolby… in _Hal_tmds_ClearEDRVaildFlag()
2933 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L +usHDMIBankOffset, 0, BIT(13)|BIT(15)); in _Hal_tmds_ClearEDRVaildFlag()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/ |
| H A D | mhal_hdmi.c | 2766 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, BIT(13)|BIT(15), BIT(13)|BIT(15)); // clr Dolby EDR enable in _Hal_tmds_ClearEDRVaildFlag()
2767 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L, 0, BIT(13)|BIT(15)); in _Hal_tmds_ClearEDRVaildFlag()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/ |
| H A D | mhal_hdmi.c | 2932 …W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L +usHDMIBankOffset, BIT(13)|BIT(15), BIT(13)|BIT(15)); // clr Dolby… in _Hal_tmds_ClearEDRVaildFlag()
2933 W2BYTEMSK(REG_HDMI3_DUAL_0_2F_L +usHDMIBankOffset, 0, BIT(13)|BIT(15)); in _Hal_tmds_ClearEDRVaildFlag()
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/ |
| H A D | hwreg_hdmi.h | 6319 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/ |
| H A D | hwreg_hdmi.h | 6321 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/ |
| H A D | hwreg_hdmi.h | 6311 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/ |
| H A D | hwreg_hdmi.h | 6321 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/ |
| H A D | hwreg_hdmi.h | 6311 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/ |
| H A D | hwreg_hdmi.h | 6321 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/ |
| H A D | hwreg_hdmi.h | 6321 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/ |
| H A D | hwreg_hdmi.h | 6311 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/ |
| H A D | hwreg_hdmi.h | 6312 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/ |
| H A D | hwreg_hdmi.h | 6311 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/ |
| H A D | hwreg_hdmi.h | 6319 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/ |
| H A D | hwreg_hdmi.h | 6319 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|
| /utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/ |
| H A D | hwreg_hdmi.h | 6319 #define REG_HDMI3_DUAL_0_2F_L (REG_HDMI3_DUAL_0_BASE + 0x5E) macro
|