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Searched refs:REG_HDMI2_20_L (Results 1 – 22 of 22) sorted by relevance

/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/
H A Dmhal_hdmi.c1108 …W2BYTEMSK(REG_HDMI2_20_L, BIT(8), BIT(8)); // [8]: 0: disable 1:enable (mask ISLAND_EN while power… in Hal_HDMI_init()
1290 …W2BYTEMSK( REG_HDMI2_20_L, BMASK(7:6)|BIT(4)|BIT(0), BMASK(7:6)|BIT(4)|BIT(0)); // [7]: 0,TMDS 1,p… in Hal_HDMI_init()
3147 W2BYTEMSK(REG_HDMI2_20_L, btrue, BIT(0)); in Hal_HDMI_Set_YUV422to444_Bypass()
3183 …W2BYTEMSK(REG_HDMI2_20_L, BIT(2), BIT(5)|BIT(3)|BIT(2)); // [5]: 0: WR_Clock_Freq, [3:2]: 2'b 01: … in Hal_HDMI_AVG_ScaleringDown()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/
H A Dmhal_hdmi.c1108 …W2BYTEMSK(REG_HDMI2_20_L, BIT(8), BIT(8)); // [8]: 0: disable 1:enable (mask ISLAND_EN while power… in Hal_HDMI_init()
1290 …W2BYTEMSK( REG_HDMI2_20_L, BMASK(7:6)|BIT(4)|BIT(0), BMASK(7:6)|BIT(4)|BIT(0)); // [7]: 0,TMDS 1,p… in Hal_HDMI_init()
3147 W2BYTEMSK(REG_HDMI2_20_L, btrue, BIT(0)); in Hal_HDMI_Set_YUV422to444_Bypass()
3183 …W2BYTEMSK(REG_HDMI2_20_L, BIT(2), BIT(5)|BIT(3)|BIT(2)); // [5]: 0: WR_Clock_Freq, [3:2]: 2'b 01: … in Hal_HDMI_AVG_ScaleringDown()
/utopia/UTPA2-700.0.x/modules/xc/hal/mustang/xc/include/
H A Dhwreg_hdmi.h1234 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maldives/xc/include/
H A Dhwreg_hdmi.h1234 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/
H A Dmhal_hdmi.c4411 …W2BYTEMSK( REG_HDMI2_20_L, BMASK(7:6)|BIT(4)|BIT(0), BMASK(7:6)|BIT(4)|BIT(0)); // [7]: 0,TMDS 1,p… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/
H A Dmhal_hdmi.c4349 …W2BYTEMSK( REG_HDMI2_20_L, BMASK(7:6)|BIT(4)|BIT(0), BMASK(7:6)|BIT(4)|BIT(0)); // [7]: 0,TMDS 1,p… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/
H A Dmhal_hdmi.c4411 …W2BYTEMSK( REG_HDMI2_20_L, BMASK(7:6)|BIT(4)|BIT(0), BMASK(7:6)|BIT(4)|BIT(0)); // [7]: 0,TMDS 1,p… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/
H A Dmhal_hdmi.c4551 …W2BYTEMSK( REG_HDMI2_20_L, BMASK(7:6)|BIT(4)|BIT(0), BMASK(7:6)|BIT(4)|BIT(0)); // [7]: 0,TMDS 1,p… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/
H A Dmhal_hdmi.c4551 …W2BYTEMSK( REG_HDMI2_20_L, BMASK(7:6)|BIT(4)|BIT(0), BMASK(7:6)|BIT(4)|BIT(0)); // [7]: 0,TMDS 1,p… in Hal_HDMI_init()
/utopia/UTPA2-700.0.x/modules/xc/hal/manhattan/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mainz/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/k6lite/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/macan/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/curry/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/kano/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/messi/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/mooney/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7621/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/M7821/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maxim/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro
/utopia/UTPA2-700.0.x/modules/xc/hal/maserati/xc/include/
H A Dhwreg_hdmi.h1216 #define REG_HDMI2_20_L (REG_HDMI2_BASE + 0x40) macro