Searched refs:REG_HDCP_TX_RI127_03 (Results 1 – 6 of 6) sorted by relevance
378 #define REG_HDCP_TX_RI127_03 0x03U // RI[15:0] 127th frame : 63[15:0] macro
388 #define REG_HDCP_TX_RI127_03 0x03U // RI[15:0] 127th frame : 63[15:0] macro