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Searched refs:REG_HDCP_TX_LN_04 (Results 1 – 12 of 12) sorted by relevance

/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/include/
H A DregHDMITx.h379 #define REG_HDCP_TX_LN_04 0x04U // Ln[55:0] : 64h[7:0] ~ 67h[7:0] macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/include/
H A DregHDMITx.h379 #define REG_HDCP_TX_LN_04 0x04U // Ln[55:0] : 64h[7:0] ~ 67h[7:0] macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/include/
H A DregHDMITx.h379 #define REG_HDCP_TX_LN_04 0x04U // Ln[55:0] : 64h[7:0] ~ 67h[7:0] macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/include/
H A DregHDMITx.h379 #define REG_HDCP_TX_LN_04 0x04U // Ln[55:0] : 64h[7:0] ~ 67h[7:0] macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/include/
H A DregHDMITx.h389 #define REG_HDCP_TX_LN_04 0x04U // Ln[55:0] : 64h[7:0] ~ 67h[7:0] macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/include/
H A DregHDMITx.h389 #define REG_HDCP_TX_LN_04 0x04U // Ln[55:0] : 64h[7:0] ~ 67h[7:0] macro
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6/hdmitx/
H A DhalHDCPTx.c473 MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_LN_04+(i/2), (Lm[i]<<8) | Lm[i-1]); in MHal_HDMITx_HdcpCheckBksvLn()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/curry/hdmitx/
H A DhalHDCPTx.c452 MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_LN_04+(i/2), (Lm[i]<<8) | Lm[i-1]); in MHal_HDMITx_HdcpCheckBksvLn()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/M7621/hdmitx/
H A DhalHDCPTx.c473 MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_LN_04+(i/2), (Lm[i]<<8) | Lm[i-1]); in MHal_HDMITx_HdcpCheckBksvLn()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/k6lite/hdmitx/
H A DhalHDCPTx.c473 MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_LN_04+(i/2), (Lm[i]<<8) | Lm[i-1]); in MHal_HDMITx_HdcpCheckBksvLn()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/maxim/hdmitx/
H A DhalHDCPTx.c473 MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_LN_04+(i/2), (Lm[i]<<8) | Lm[i-1]); in MHal_HDMITx_HdcpCheckBksvLn()
/utopia/UTPA2-700.0.x/modules/hdmi/hal/kano/hdmitx/
H A DhalHDCPTx.c473 MHal_HDMITx_Write(HDMITX_HDCP_REG_BASE, REG_HDCP_TX_LN_04+(i/2), (Lm[i]<<8) | Lm[i-1]); in MHal_HDMITx_HdcpCheckBksvLn()